MergedBits write problem on QG8

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MergedBits write problem on QG8

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irob
Contributor V
Anyone know why this isn't working?

FCDIV_DIV = 19; // divisor for FLASH clock divider (decimal)

In the MC9S08QG8.h header file, FCDIV_DIV is defined as the merged bits (_FCDIV.MergedBits.grpDIV) of the FCDIV register. I realize that the foolproof method of setting these bits accordingly would be simply:

FCDIV = 0x13; // FLASH clock initialization to 200kHz for 4MHz bus clock

But it's more readable the other way, since that's how the datasheet lists the DIV bits.

I know that using the merged bits method works, as I've used it successfully for the timer register:

TPMSC_CLKSx = 0b01; // Select BUS clock

Any ideas why the QG8 doesn't like this method in the FCDIV register?
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peg
Senior Contributor IV

Hi Rob,

FCDIV is "write once" which is possibly causing your problem.

Note to Freescale:

At 4.5.2 (the registers desciption) this is NOT mentioned, although it is mentioned at 4.7.1

Regards David

 

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irob
Contributor V
Ahh, ok. That's good enough for me.
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