BDM ignored when /XCLKS tied to GND (Pierce config)

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BDM ignored when /XCLKS tied to GND (Pierce config)

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JonHart
Contributor I
Hi,
 
We are using MC9S12DP512 with Pierce oscillator.  Debugging with Cosmic ZAP and P&E USB Multilink.
 
The Freescale docs say that /XCLKS must be grounded on reset to get the Pierce oscillator to work.  This is true.  We are finding, however, that this prevents the Multilink from working.  In fact, with the BDM cable connected, the processor resets and runs (which it shouldn't do) if /XCLKS is tied to GND.
 
We are coming to the conclusion that there is a bug somewhere, since the P&E dev board has a Pierce Crystal config but THEY dont tie /XLCKS to GND ( how come? )
 
If we dont GND /XCLKS we never acheive a PLL lock and stay in "limp home" mode.
 
Any help much appreciated!
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JonHart
Contributor I
Changed 16Mhz oscillator to 4Mhz and everything works now.  Another thread has this covered.
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mke_et
Contributor IV
I can tell you I have a design with the 9S12DP256B that I has either a crystal or a can osc, and the USB pod works fine on that in both configurations. Also, I use the 9S12DG128 (80 pin package)on my newest design, and I use it both ways.

However... in early developement I had what I thought were severe noise issues causing a problem on the DP256 part in pierce mode, so I changed to a Colpits configuration and it worked fine.
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imajeff
Contributor III
I'm not an expert on this, but might have seen similar trouble on my board. Thing is, the whole xtal circuit is quite sensetive, and there may just be something you didn't know about how it should work.

I have this problem with my D-Bug12 POD where sometimes it doesn't connect initially depending on what is loaded into the target. Especially if there is nothing (so MCU is running wild), the POD is unable to get started unless is does the reset on it's own. That way it can controll it immediately as it comes out of reset.

I'm not sure what you mean that it "resets and runs". I don't know why any MCU should not run when comming out of reset. Perhaps you just mean the BDM POD doesn't stop it from running, which is the problem I have occasionally.
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JonHart
Contributor I
Thanks for the response
 
>>I'm not sure what you mean that it "resets and runs".
 
Normally, if you have a BDM cable connected, the processor is held ( i.e. cannot run ) until it is told to by the BDM device ( Multilink ).  In my case the BDM never stops it from running.
 
I have found out that the DP256 fitted to the P&E dev kit (mask 1k79X) does not support Pierce mode (thanks forum!).  The hardware implementation has a crystal  but the MCU is configured in Colpitts mode - and it works too!
 
How do I find out whether my 512 supports Pierce?
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Alban
Senior Contributor II

Hi Jon,

The Clock Generator Module or CGM datasheet should give you details on the oscillator characteristics.
You can download the datasheet from the product page on Freescale website.

Cheers,
Alban.

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imajeff
Contributor III
For the BDM to take charge before any user code is executed, the target has to be taken out of reset while the MODC (BKGD) pin is held low. That activates BDM firmware initially.

I think I heard some PODs need a lower value resistor on their BKGD output so that they will easier pull down this pin to start out in special (BDM) mode.

Once I think I had to hold the BKGD (pin23) low with a jumper while powering on, just so I could override because the BDM wasn't connecting.

Message Edited by imajeff on 05-26-200601:48 PM

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