Jeff Smith

FCLKDIV register reconfiguring

Discussion created by Jeff Smith on May 10, 2006
Latest reply on May 11, 2006 by Alban Rampon
If I
1. configure FCLKDIV for no PLL
2. load some Flash
3. enable PLL (bus jumps 8 to 24 MHZ)

Does FCLKDIV (esp. FDIVLD) stay the same and therefore cause danger in not noting that it may need re-initialized?