Joe Haas

interrupt routine register stacking

Discussion created by Joe Haas on May 9, 2006
Latest reply on May 12, 2006 by Marc Paquette
I am running CW 6.2 and compiling for MCF5407.
 
I have an interrupt routine that needs to access the stack.  However, the compiler is saving several registers (D0, D1, D2, A0, & A1) to the stack at the beginning of the ISR.  Can I control which (if any) registers get saved to the stack?  If not, can I count on these registers always getting stacked as depicted below?
 
Code snippets follow:
 
<pre>
__declspec(interrupt)
void asm_exception_handler (void)
{
asm
   {
   /* Change to dBUG stack space */
   move.l  sp,__SP_INIT
   move.l  #__SP_INIT,sp
   move.l  a0,-(sp)
   lea     _contextr,a0
   movem.l d0-d7/a0-a7,(a0)    /* d0-d7/a0-a7 (a0/a7 are bad)   */
   move.l  (sp)+,r_a0(a0)      /* a0    */
the dissasembly view:
7E000D7C: 4FEFFFEC        lea      -20(a7),a7
7E000D80: 48D70307        movem.l  d0-d2/a0-a1,(a7)
7E000D84: 23CF00048188    move.l   a7,0x00048188 (0x48188)
7E000D8A: 2E7C00048188    movea.l  #295304,a7
7E000D90: 2F08            move.l   a0,-(a7)
7E000D92: 41F90004397A    lea      0x0004397A (0x4397a),a0
7E000D98: 48D0FFFF        movem.l  d0-d7/a0-a7,(a0)
7E000D9C: 215F0020        move.l   (a7)+,32(a0)
</pre>
Thanks,
 
Joe
 

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