Barry Gordon

908AP32A COP enable

Discussion created by Barry Gordon on May 4, 2006
Latest reply on May 4, 2006 by Barry Gordon
I'm using the 908AP32A. The WD or COP is enabled by setting the COPD bit in config1 to zero (power-on reset state). On a prior design using the HC05 processor this was a write once registor. On the 908AP32A this is not indicated as such, meaning if I have a power surge this bit could toggle to a logic "1" disabling the WD. This appears to be whats happening in a test stress condition. Is this true? I am not writting to this registor, I'm using the power-on state. Is this registor really a write-once (as it should be)? Should I write a zero to this registor? Or is there something that I'm missing?
 
Any help would be greatly appreciated.
 
 

Outcomes