digitalDNA

Interrupt Handling - Saving Registers

Discussion created by digitalDNA on Apr 28, 2006
Latest reply on Apr 28, 2006 by MIKE YETSKO
Hello,

I have a question regarding the Resets and Interrupts Tutorial part.

When an interrupt is to be entered, the CPU first stores the registers in the following order:

CCR, A, X, PC_H, PC_L

Quote:
"CCR, being the first register to be restored, the I bit is also restored, enabling interrupts".

Is it possible that a queued interrupt or a newly coming interrupt is serviced BEFORE the other registers are restored (because of the I bit), corrupting by that the stack content ?


Best Regards,
Roger Tannous.

Outcomes