MCF5282: irq questions / SR[12]: master/interrupt state

[e31]

Hi,

I'm playing the first time with the coldfire. Entering critical sections I have to disable all interrupts.

1) What is the correct way? Setting the interrupt level mask to 7? I need a fast solution!

// enter critical section
strldsr #0x2700 or [move.w sr,d0 / move d0,4(sp) / move #0x2700,sr]

// do something
...

// leave critical section
move (sp)4,d0
move.w d0,sr


2) What is the purpose of the flag 'master/interrupt state' in the status register SR[12]?

3) How can the opcode 'strldsr' used with CW 6.1 and target MFC5282?

CW-Setting target CPU: MCF528X
CW-Error: Instruction not legal for current target processor(s)

Best Regards,
e31

[DavidS]

Hi e31,

Tab over or indent a few spaces in your 'C' file then enter:

 asm( dc.w 0x40e7);   //high word opcode
 asm( dc.w 0x46fc);    //low word opcode
 asm( dc.w 0x2700);   //immediate SR value

to have the strldsr instruction opcode added to the source code.

It's been a long time but I think the master/interrupt flag has been used by RTOS vendors as a way to determine if they are in an interrupt routine...or as a semaphore. 

Regards, DavidS