Serial Bootloader (AN2153) for S12X

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Serial Bootloader (AN2153) for S12X

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Sten
Contributor IV
Has anybody converted the AN2153 Serial Bootloader for 9S12 to the S12X-family? The original code does move the 9S12 RAM to overlap the upper Flash, but that is not possible with the S12X. To avoid reinventing the wheel; can anybody point me to some information how to do the same job on the S12X-family?
 
thx
Sten
 
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allano
Contributor I

I am needing an assembly bootloaders for these two chips.  I can write my own but if it has already been done that would be greatly appreciated.  I have seen some mention in the "Files" section but I can not locate that either.  Thank you, AllanO

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freescale_dude
Contributor II

Try this link:

 

http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=S12D&tab=Documentation_Tab&pspll=1&Se...

 

Then click on application notes at the left. There are several downloader app notes there, and some of them have software archives.

 

---Tom

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allano
Contributor I

Thanks I will try them.

Allan

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Sten
Contributor IV
I'm still struggling to get the serial bootloader to work on the 9S12XDP512. It seems to be so close, but .... Can anybody help me to find the error in the programming routine below.
 
When I run it in the debugger and have a break at the 'dec NumWords,sp' in the programming loop, it works fine. But if I let the program loop run freely (having a break in the beginning of the verify loop), every second or every third word will remain unprogrammed.
 
The routine is entered with 16 words (32 bytes) from a S19-file to program, but six of the words fail to program (remains FF FF). It seems to be some timing problem, but I can't figure it out.
 
Code:
               INCLUDE         'mc9s12xdp512.inc'.....FCLKDIVVal:     equ             19                              ; value for the FCLKDIV register. (4MHz oscillator).....                ldab            #FCLKDIVVal                     ; value for the Flash clock divider register.                stab            FCLKDIV.....ProgFBlock:     ldab            DataBytes,pcr                   ; get the block size.                lsrb                                            ; divide the byte count by 2 since we program a word at a time.                pshb                                            ; allocate the local (NumWords,sp).                ldx             PPAGEWAddr,pcr                  ; get the PPAGE window Flash address.                leay            SRecData,pcr                    ; point to the received S-Record data.ProgLoop:       ldd             2,y+                            ; get a word from the buffer.                std             2,x+                            ; latch the address & data into the Flash program/erase buffers.                ldab            #PROG                           ; get the program command.                stab            FCMD                            ; write it to the command register.                ldab            #mFSTAT_CBEIF                   ; start the command by writing a 1 to CBEIF.                stab            FSTAT                nop                nop                nop                nop                ldab            FSTAT                           ; check to see if there was a problem executing the command.                bitb            #mFSTAT_PVIOL+mFSTAT_ACCERR     ; if either the PVIOL or ACCERR bit is set,                bne             Return                          ; return.                brclr           FSTAT,#mFSTAT_CBEIF,*           ; wait here till the command buffer is empty.                dec             NumWords,sp                     ; any more words to program—                bne             ProgLoop                        ; yes. continue until done.                brclr           FSTAT,#mFSTAT_CCIF,*            ; no. wait until all commands complete.;                ldab            DataBytes,pcr                   ; get the block size.                lsrb                                            ; divide the byte count by 2 since we verify a word at a time.                stab            NumWords,sp                     ldx             PPAGEWAddr,pcr                  ; get the PPAGE window Flash address.                leay            SRecData,pcr                    ; point to the received S-Record data.VerfLoop:       ldd             2,y+                            ; get a word from the buffer.                cpd             2,x+                            ; same as the word in Flash–                bne             Return                          ; no. return w/ an error (!= condition).                dec             NumWords,sp                     ; yes. done comparing all words˜                bne             VerfLoop                        ; no. compare some more.;Return:         pulb                                            ; deallocate the local.                rts                                             ; return.

 
PS. I'm using CW for HC12 v. 4.5 build 6037
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imajeff
Contributor III
BTW it helps me if you show the assebly listing so it shows what the symbols resolved to, as well as what addresses in memory.
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Sten
Contributor IV

Thanks Imajeff, but I have checked the erratas, and my chipset (0L15Y) does not include anything about programming Flash.

Here is the disassembled listing of the (not working version of the) program loop (almost identical to the AN2153). I did read somewhere on the forum a note about a delay before the CBEIF-bit is cleared, so I did put in the NOPs, but they did not help.

a00FAFA E6FA 02D7   ProgFBlock:     ldab            DataBytes,pcra00FAFE 54                          lsrba00FAFF 37                          pshba00FB00 EEFA 02D2                   ldx             PPAGEWAddr,pcra00FB04 19FA 02D3                   leay            SRecData,pcra00FB08 EC71        ProgLoop:       ldd             2,y+a00FB0A 6C31                        std             2,x+a00FB0C C620                        ldab            #PROGa00FB0E 7B01 06                     stab            FCMDa00FB11 C680                        ldab            #mFSTAT_CBEIFa00FB13 7B01 05                     stab            FSTATa00FB16 A7                          nopa00FB17 A7                          nopa00FB18 A7                          nopa00FB19 A7                          nopa00FB1A F601 05                     ldab            FSTATa00FB1D C530                        bitb            #mFSTAT_PVIOL+mFSTAT_ACCERRa00FB1F 2627                        bne             Returna00FB21 1F01 0580                   brclr           FSTAT,#mFSTAT_CBEIF,* 00FB25 FB         a00FB26 6380                        dec             NumWords,spa00FB28 26DE                        bne             ProgLoopa00FB2A 1F01 0540                   brclr           FSTAT,#mFSTAT_CCIF,* 00FB2E FB                             ;a00FB2F E6FA 02A2                   ldab            DataBytes,pcra00FB33 54                          lsrba00FB34 6B80                        stab            NumWords,spa00FB36 EEFA 029C                   ldx             PPAGEWAddr,pcra00FB3A 19FA 029D                   leay            SRecData,pcra00FB3E EC71        VerfLoop:       ldd             2,y+a00FB40 AC31                        cpd             2,x+a00FB42 2604                        bne             Returna00FB44 6380                        dec             NumWords,spa00FB46 26F6                        bne             VerfLoop                    ;a00FB48 33          Return:         pulba00FB49 3D                          rts


 
When I change the program so that the loop checks the CCIF-bit instead of the CBEIF, it works fine, but as this it leaves every second or every third word unprogrammed.

Note! The program is moved to RAM before executing, so the addresses in the listing will acutally be above 2000 instead of F800.

This is not so critical anymore, because I have a working version, but it would be interesting to know why the CBEIF-approach doesn't work.

 

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imajeff
Contributor III
w/o trying it, my first guess is to increase that delay (before testing CBEIF) until it works, then I'm curious how long it needs to be. Eventually, increasing that delay would work, although there might be a better solution I can't see yet. That is of course because eventually the delay would be long enough that the command would always be complete :-/
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Sten
Contributor IV

I got it working myself by changing the prog_loop to directly check the CCIF-bit instead of the CBEIF-bit:

Code:

                bitb            #mFSTAT_PVIOL+mFSTAT_ACCERR     ; if either the PVIOL or ACCERR bit is set,                bne             Return                          ; return.                brclr           FSTAT,#mFSTAT_CCIF,*            ; wait here until all commands complete.                dec             NumWords,sp                     ; any more words to program—                bne             ProgLoop                        ; yes. continue until done.;                ldab            DataBytes,pcr                   ; get the block size.


 
Can somebody explain why the code checking the CBEIF-bit did not work, but this does?

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imajeff
Contributor III
Waiting for buffer-empty is supposed to work for speed programming, but you can never continue on after it's programmed until all programming commands are complete. Oh maybe you did that, I'll try to look at it more.

Oh, I can't tell where this program resides, or where it goes back to when it exits.

Also maybe check errata. It's been common to give us great ideas in the specification, then tell us only in the errata that it will do us no good.

Message Edited by imajeff on 05-16-200608:24 AM

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MichaelA
Contributor I

Hey Sten,

I used AN 2720 to program and erase flash.  It has a few functions in it that let you initialize the flash module, program a flash word, and erase a flash sector (including the function that copies the flash code that needs to run out of RAM).  You'll need to make some changes though, because of the way the S12X handles global address aceess (theres a thread I started about this earlier that explains the difference).  Once you get those function working, writing an application that reads an S-Record file through SCI is pretty straight forward.

I hope that helps...

- Michael

(Alban linked AppNote)

Message Edited by Alban on 04-26-2006 11:40 AM

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Sten
Contributor IV
Thanks Michael,
 
but I did already find another solution; the AN1718 contains a serial bootloader which copies the code from Flash to RAM, and by combining it with AN2153 (which relies on overlapping Flash and RAM, which does not work on a S12X), I think I now have a working solution (haven't tested it yet though).
 
Sten
 
(Alban edited to link AppNotes to faciliate searches)

Message Edited by Alban on 04-26-2006 11:41 AM

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