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Tower 51CN pinout cheat-spreadsheet -blog archive

Discussion created by WestfW WestfW on Sep 5, 2009
I wanted a clearer picture of what pins of the 51CN were dedicated to which functions (if any), and where they showed up on the connectors and etc. So I've put together this google-doc spreadsheet: 51cn128clk Tower System Spreadsheethttp://spreadsheets.google.com/ccc?key=0AqdMB5dovDUZdFlUZWVCNmxsZG5...  One of the happy discoveries was that the elevator connectors (the 2mm socket strips) have pinouts that match the PCIe connectors - there's an A connector that matches up with A0..A80 of PCIe, and the B connector for B0..80  It turns out that the Serial Board is pretty good about not using up pins it doesn't need. Aside from the boatload of pins used for the ethernet MII interface.  The most questionable thing I found was that the A2D pin used for (hardwired to) the Y axis accelerometer on the cpu board is also used for USBOTG power control on the serial board. (There is a jumper that prevents this pin from connecting from CPU to the bus, however, and the USB on the serial board is non-functional with the 51CN anyway.) The elevator bus and cpu board are set up to use the "mini-flex-bus" feature of the chip, but this is not used by the serial board, and it looks very non-invasive (those cpu pins are connected directly to the bus as well as via the latch used by the flexbus.)  This spreadsheet is based on the freescale schematics, and has not been thoroughly checked for mistakes (if anyone notices any, let me know!) Use without verification at your own risk.  Also pdf: TOWER-51CN128CLK.pdf

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