Miguel Bombach

Weird SPI Behaviour

Discussion created by Miguel Bombach on Apr 6, 2006
Latest reply on Apr 12, 2006 by Mark Hotchkiss
I currently have two MC9S12NE64s, one acting as a master and the other a slave. The master is transmitting nicely. As a test I have it cycle and transmit between 0 and 255. On the recieving end I notice some weird results! It gets the data, but depending on when it is reset and initialized it sometimes has the bits arranged incorrectly.

For clarification SPI master is sending 0x01, 0x02, 0x03, etc.
SPI Slave sometimes receives correct data, sometimes it gets 0x02, 0x04,0x06 or 0x04,0x08,0x0C or 0x08,0x10,0x18 and so on.

Sometimes its shift orientation is off from what it should be!

I'm using interrupts as to allow the processor to do other things. Also using Codewarrior and demo boards.

I'm completely baffled. Any help would be greatly appreciated!

Thanks

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