MCF54455 Debugging Problem

[ianr_omnitronic]

We are using an Axiom USB debugger which doesn't connect to the V4 processor on our board. These boards have never been able to connect. They look like they start with an SD clock and a CS0 access of 8 selects, so it looks like it wants to work. The debugger can connect to the Freescale MDF54455 development system we have. As far as I can tell, we have the same connections on the processor as the development system.

Please see the attached partial schematic for the processor.

Regards

IanR

[TomE]

> The debugger can connect to the Freescale MDF54455 development system we have.

Freescale says 'No results were found matching "MDF54455"'.

I guess you've got the "M54455EVB".

Looking at the development board, it is hard to know what it is doing as everything interesting seems to go through the FPGA or CPLD.

I'd suggest you compare the design to the M54451EVB, which is a bit simpler.

One thing I've noticed about your debug connector though, nothing is connected to Pin 1. The Debugger may need to see the CPU Reset Output in order to work.

A second thing I've noticed is that you have the BDMRSTN signal going into the MAX809. That will add an 85-300ms delay from when the debugger lets go of Reset until the CPU sees it. That may be way too long. On the M54451EVB this connects directly to the CPU's Reset In pin.

I'd suggest changing the MAX809 to a MAX803, changing the pulldown to a pullup and connecting the diode from BDMRSTN to the MAX803's output.

Otherwise I'd suspect some of the clocking and boot mode inputs to the CPU. Compare them (with an oscilloscope) with the development board.

Tom

[ianr_omnitronic]

Hi Tom

My sincere thanks for your direction. We have ended up with no reset chip, a 10K pullup on reset and BDMRST driving reset. This works. This will give the software boys something to develop with.

Many thanks again.

Ian