UART transfers blocked when MODEM reg enables RTS & CTS

[comsosysarch]

Many thanks in advance for looking at this.

K60 144-pin QFP 100 MHz device, external crystal clocked at 50 MHz.

My UART reception is handled by interrupt and I am not worried about that yet. I am having trouble with the transmit side getting started.

My UART transmissions are being handled by DMA (because mostly they involve huge blocks). They are fine when the MODEM register is at its default value and hardware (RTS/CTS pin) flow control is disabled. When I build the application with the MODEM register set to enable RTS & CTS then my DMA channel hangs and my little initial "Hello World!" message never gets sent. Same problem on UART0 and UART4.

The actual hardware levels of the flow control are both approx 0 Vdc so these active-low signals should be enabling transmission.

I had a nearly identical project on this same chip where we had the same problem but it was a UART connected to a FTDI USB chip and it would only hang like this if the USB was plugged in during boot. Apparently resetting the USB during boot would work around this but mean the USB cable would have to be re-plugged.

Anyhow, except for that one case it used to work. Now on this project I am having the UART DMA transmit block "hang" every time regardless of whether the USB cable is plugged in.

So... I am thinking there is some order of configurations that I am not performing correctly.

Has anyone else had a problem like this? Is there some chip errata I am missing? Or do you see something I am doing out of sequence?

The relevant part of my UART setup code pared down to keep it readable...

unsigned short sbr = EXTAL_CLOCK_FREQ / (baud << 4);unsigned char brfdX32 = ((EXTAL_CLOCK_FREQ << 1) + (baud >> 1)) / baud - (sbr << 5);pUART->BDH = sbr >> 8;pUART->BDL = sbr & 0x00ff;pUART->C4 = brfdX32 & 0x1f;pUART->MODEM = 0x0f & (UART_MODEM_TXCTSE_MASK | UART_MODEM_RXRTSE_MASK) & ~(UART_MODEM_TXRTSE_MASK | UART_MODEM_TXRTSPOL_MASK); // 0x09pUART->C5 = UART_C5_TDMAS_MASK;pPort->PCR[RxPortBit] = PORT_PCR_MUX(3);pPort->PCR[TxPortBit] = PORT_PCR_MUX(3) | PORT_PCR_DSE_MASK;pPort->PCR[CTSportBit] = PORT_PCR_MUX(3);pPort->PCR[RTSportBit] = PORT_PCR_MUX(3) | PORT_PCR_DSE_MASK;startNVIC(RxIRQnum, RxIRQpriority); // this enables the interrupt for the receiverpUART->C2 = UART_C2_RIE_MASK | UART_C2_TE_MASK | UART_C2_RE_MASK;// that is all for the initialization// then when I transmit a block I set up the DMA channel for the particular transmit block// and finally...pUART->C2 |= UART_C2_TIE_MASK;

[comsosysarch]

Oddly, I have a very similar project where this works with flow control even though the cable is plugged in prior to boot.

But this project does not use DMA or even IRQ, it is a simple polled interface.

So I am wondering if there is some issue with the interaction of RTS/CTS flow control, the IRQ or DMA engine, and an external flow control signal that is already enabled prior to boot? Or it still may be something in the setup sequence in the code.

Setup code for the working polling loop project...

unsigned short sbr = EXTAL_CLOCK_FREQ / (BAUDRATE << 4);unsigned char brfdX32 = ((EXTAL_CLOCK_FREQ << 1) + (BAUDRATE >> 1)) / BAUDRATE - (sbr << 5);SIM->SCGC4 |= SIM_SCGC4_UART0_MASK | SIM_SCGC4_UART1_MASK | SIM_SCGC4_UART2_MASK | SIM_SCGC4_UART3_MASK;SIM->SCGC1 |= SIM_SCGC1_UART4_MASK | SIM_SCGC1_UART5_MASK;UART_BASE->BDH = sbr >> 8;UART_BASE->BDL = sbr & 0x00ff;UART_BASE->C4 = brfdX32 & 0x1f;UART_BASE->MODEM = 0x0f & (UART_MODEM_TXCTSE_MASK | UART_MODEM_RXRTSE_MASK) & ~(UART_MODEM_TXRTSE_MASK | UART_MODEM_TXRTSPOL_MASK);UART_PORT->PCR[UART_BIT_RX] = PORT_PCR_MUX(3);UART_PORT->PCR[UART_BIT_TX] = PORT_PCR_MUX(3) | PORT_PCR_DSE_MASK;UART_PORT->PCR[UART_BIT_CTS] = PORT_PCR_MUX(3);UART_PORT->PCR[UART_BIT_RTS] = PORT_PCR_MUX(3) | PORT_PCR_DSE_MASK;UART_BASE->C2 = UART_C2_TE_MASK | UART_C2_RE_MASK;

[Kari]

Hi,

Did you get this this solved? I have the exact same problem in my project. TX is ok without flow control, but is blocked when flow control is enabled.

Regards,

Kari