AnsweredAssumed Answered

K70 problems with maximum_config.h and user_config.h

Question asked by James Rasmussen on May 30, 2012
Latest reply on Nov 14, 2012 by David E Seymour

Hello,

 

I'm having major problems with my project in using the maximum_config.h file rather than small_ram_config.h.  I'm using maximum_config.h because the data areas of my program have simply outgrown the 16Kbytes of Internal RAM on the K70, and I would like to use all of the external 16Mbytes of LPDDR Ram natively (all stacks, .bss sections, etc to be in LPDDR). 

 

I am having a problem with an unhandled interrupt occurring immediately as the K70 is jumping to the main() routine of my application, causing a reset on the MCU.  The Stack Pointer is set properly in LPDDR ram (which is accessible) prior to going to main(), but one the ISR occurs, the stack pointer reverts back to Internal SRAM locations.  Any ideas why I might be getting this unknown interrupt?

 

Also, do I have a problem with my .mem and .lcf files in my application build?  The files are listed below.  The processor used is the K70FX512-120Mhz

 

intflash_ddr.lcf:

MEMORY{   vectorrom   (RX): ORIGIN = 0x00000000, LENGTH = 0x00000400   cfmprotrom  (R):  ORIGIN = 0x00000400, LENGTH = 0x00000020   rom         (RX): ORIGIN = 0x00000420, LENGTH = 0x000FFBE0  # Code + Const data      ram         (RW): ORIGIN = 0x70000000, LENGTH = 0x01000000  # LPDDR - RW data - Cached Writeback   # kernel space starts after RAM variables (Location of MQX Kernel data + MQX heap)   end_of_kd   (RW): ORIGIN = 0x707FFFF0, LENGTH = 0x00000000      # Boot stack reused by MQX Kernel data   bstack      (RW): ORIGIN = 0x20007c00, LENGTH = 0x00008000  # Boot stack - 32KBbytes   end_bstack  (RW): ORIGIN = 0x2000FBFF, LENGTH = 0x00000000      # LPDDR stack for MQX Kernel data   lpd_stack      (RW): ORIGIN = 0x70F00000, LENGTH = 0x00100000  # Boot stack   lpd_end_bstack  (RW): ORIGIN = 0x70FFFFFF, LENGTH = 0x00000000}KEEP_SECTION { .vectors_rom, .vectors_ram, .cfmconfig }SECTIONS{   __INTERNAL_SRAM_BASE  = 0x1FFF0000;   __INTERNAL_SRAM_SIZE  = 0x00020000;   __SRAM_POOL = 0x1FFF0000;   __INTERNAL_FLASH_BASE = 0x00000000;   __INTERNAL_FLASH_SIZE = 0x00080000;   __INTERNAL_FLEXNVM_BASE = 0x10000000;   __INTERNAL_FLEXNVM_SIZE = 0x00080000;      __INTERNAL_FLEXRAM_BASE = 0x14000000;   __INTERNAL_FLEXRAM_SIZE = 0x00004000;      __EXTERNAL_MRAM_BASE  = 0x60000000;   __EXTERNAL_MRAM_SIZE  = 0x00080000;   __EXTERNAL_MRAM_ROM_BASE = 0x60000000;   __EXTERNAL_MRAM_ROM_SIZE = 0x00000000;   __EXTERNAL_MRAM_RAM_BASE = 0x60000000;   __EXTERNAL_MRAM_RAM_SIZE = 0x00080000;   __EXTERNAL_DDR2_RAM_BASE = 0x70000000;   __EXTERNAL_DDR2_RAM_SIZE = 0x01000000;   __EXTERNAL_LCD_BASE = 0x60000000;   __EXTERNAL_LCD_SIZE = 0x1FFFF;   __EXTERNAL_LCD_DC_BASE = 0x60010000;   # MQX link time configurations   __DEFAULT_PROCESSOR_NUMBER = 1;   __DEFAULT_INTERRUPT_STACK_SIZE = 1024;   __KERNEL_DATA_VERIFY_ENABLE = 0;    # Test SDRAM read/write   # Flashx configurations   __FLASHX_SECT_SIZE = 0x1000;    .vectors :    {        __VECTOR_TABLE_ROM_START = .;        # Runtime vector table in sram        *(.vectors_rom)        . = ALIGN (0x4);     } > vectorrom    .cfmprotect :    {        *(.cfmconfig)        . = ALIGN (0x4);    } > cfmprotrom    .main_application :    {        *(KERNEL)        *(S_BOOT)        *(IPSUM)        *(.text)        *(.init)        *(.fini)        *(.eini)        *(.ctors)        *(.dtors)        . = ALIGN(0x4);        *(.rodata)        . = ALIGN(0x4);        *(.rdata)        . = ALIGN(0x4);        *(.exception)        . = ALIGN(0x4);        __exception_table_start__ = .;        EXCEPTION        __exception_table_end__ = .;        __sinit__ = .;        STATICINIT        . = ALIGN(0x4);        __COPY_OF_DATA = .;    } > rom    .main_application_data : AT(__COPY_OF_DATA)    {        . = ALIGN(128);        __VECTOR_TABLE_RAM_START = .;        # Runtime vector table in sram        *(.vectors_ram)        . = ALIGN(512);        __BDT_BASE = .;        *(.usb_bdt)        __BDT_END = .;        __START_DATA = .;        *(.data)        __END_DATA = .;        . = ALIGN(0x4);        __START_SDATA = .;        *(.sdata)        __END_SDATA = .;        . = ALIGN(0x4);        __SDA_BASE  = .;        __SDA_BASE_ = __SDA_BASE;        . = ALIGN(16);    } > ram    .main_application_bss :    {        . = ALIGN(0x10);        __START_SBSS = .;        *(.sbss)        *(SCOMMON)        __END_SBSS = .;        __START_BSS = .;        *(.bss)        *(COMMON)        __END_BSS = .;        . = ALIGN(16);    } >> ram    .kernel_data : #AT(ADDR(.main_application_bss) + SIZEOF(.main_application_bss))    {        __KERNEL_DATA_START = ALIGN(0x10);    }    .end_of_kernel_data :    {        __KERNEL_DATA_END = .;        __SP_INIT    = .;    } > end_of_kd    .boot_stack :    {        _stack_end = .;    } > bstack       .end_of_boot_stack :    {        _stack_addr  = .;        __BOOT_STACK_ADDRESS = .;    } > end_bstack    # Locate the ROM copy table into ROM after the initialized data    _romp_at = __COPY_OF_DATA + SIZEOF(.main_application_data);    .romp : AT (_romp_at)    {        __S_romp = _romp_at;        WRITEW(__COPY_OF_DATA);                    #ROM start address        WRITEW(ADDR(.main_application_data));      #RAM start address        WRITEW(SIZEOF(.main_application_data));    #size        WRITEW(0);        WRITEW(0);        WRITEW(0);    }    _flashx_start = __COPY_OF_DATA + SIZEOF(.main_application_data) + SIZEOF(.romp);    # flashx working area spans across the whole rest of Flash memory    __FLASHX_START_ADDR = ((_flashx_start + __FLASHX_SECT_SIZE - 1) / __FLASHX_SECT_SIZE) * __FLASHX_SECT_SIZE;    __FLASHX_END_ADDR = __INTERNAL_FLASH_BASE + __INTERNAL_FLASH_SIZE;}/* EOF */

 k70fx512m12.mem:

// Memory Configuration File//// Description://  A memory configuration file contains commands that define the legally accessible//  areas of memory for your specific board. Useful for example when the debugger//  tries to display the content of a "char *" variable, that has not yet been initialized.//  In this case the debugger may try to read from a bogus address, which could cause a//  bus error.//// Board://  Kinetis K70FX512//// Reference://  -// All reserved ranges read back 0xBABA...reservedchar 0xBAusederivative "MK70F15"//         Memory Map://         ----------------------------------------------------------------------range      0x00000000 0x000FFFFF 4 ReadWrite    // 1024KB Code Flashreserved   0x00100000 0x07FFFFFFrange      0x08000000 0x08FFFFFF 4 ReadWrite    // LPDDRrange      0x14000000 0x14003FFF 4 ReadWrite    // 16KB Programming accelleration RAMreserved   0x14004000 0x1FFEFFFFrange      0x1FFF0000 0x1FFFFFFF 4 ReadWrite    // 64KB On chip SRAM (TCML)range      0x20000000 0x2000FFFF 4 ReadWrite    // 64KB On chip SRAM (TCMU)reserved   0x20010000 0x21FFFFFFrange      0x22000000 0x221FFFFF 4 ReadWrite    // Aliased to TCMU SRAM bitbandreserved   0x22200000 0x3FFFFFFFrange    0x60000000 0x6FFFFFFF 4 ReadWrite // Flexbus (External Memory - Write-back)range      0x70000000 0x70FFFFFF 4 ReadWrite    // LPDDR Writebackrange      0x80000000 0x80FFFFFF 4 ReadWrite    // LPDDR Writethrureserved   0x90000000 0xDFFFFFFF    // Flexbus for external memory - Write-thrureserved   0xE0100000 0xFFFFFFFF

 

Thanks for any help,

--James

 

Outcomes