Bug in TWRK60F120M ADC0_SE4/5/6/7a

[keithtang]

This is concerning the BSP twrk60f120.

Either the reference manual I am reading (K60P144M150SF3RM Rev 2 Dec 2011) is wrong, or the MQX library is wrong, I don't see ADC0_SE4a, ADC0_SE5a, ADC0_SE6a, and ADC0_7a in the reference manual (Section 3.7.1.3.1 ADC0 channel assignment for 144-pin package, page 131), however I see the implementation in the init_gpio.c file, line 351. Reproduced as follow:

    /* Conversion table for ADC0x inputs, where x is 4 to 7, mux is defaultly "A" */
    const static uint_8 adc0_conv_table_a[] = {
        ADC_SIG_PORTE | 16, /* ADC0_SE4a */
        ADC_SIG_PORTE | 17, /* ADC0_SE5a */
        ADC_SIG_PORTE | 18, /* ADC0_SE6a */
        ADC_SIG_PORTE | 19  /* ADC0_SE7a */
    };

The max Port E port is only up to 12, Port E 16 to 19 do not exist.

Someone please verify, thanks.

[c0170]

Hello keith tang,

i read your new posts here in MQX section regarding ADC driver and i am going to give a glance to the TWRK60F120 .

i'll get back to your posts with the answers tommorow.. By the way, thank you for your findings !

Regards,

MartinK

[keithtang]

Hello MartinK，

Thanks for the reply, appreciated. If you are going to look into this, I suggest you to also look into adc_mk60.h. Besides the mentioned problem:

1. there are many non-exitance channels such as ADC0_SOURCE_AD21/22, etc. These channels are marked as "reserved" in the manual.

2. the ADC2 and ADC3 macros are missing.

3. The mixed-up ADC_SOURCE_MUXSEL_A, ADC_SOURCE_MUXSEL_B, and ADC_SOURCE_MUXSEL_X macros in several places.

/kht