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Bug in TWRK60F120M ADC0_SE4/5/6/7a

Question asked by keith tang on May 27, 2012
Latest reply on May 28, 2012 by keith tang

This is concerning the BSP twrk60f120.

 

Either the reference manual I am reading (K60P144M150SF3RM Rev 2 Dec 2011) is wrong, or the MQX library is wrong, I don't see ADC0_SE4a, ADC0_SE5a, ADC0_SE6a, and ADC0_7a in the reference manual (Section 3.7.1.3.1 ADC0 channel assignment for 144-pin package, page 131), however I see the implementation in the init_gpio.c file, line 351. Reproduced as follow:

 

    /* Conversion table for ADC0x inputs, where x is 4 to 7, mux is defaultly "A" */
    const static uint_8 adc0_conv_table_a[] = {
        ADC_SIG_PORTE | 16, /* ADC0_SE4a */
        ADC_SIG_PORTE | 17, /* ADC0_SE5a */
        ADC_SIG_PORTE | 18, /* ADC0_SE6a */
        ADC_SIG_PORTE | 19  /* ADC0_SE7a */
    };

The max Port E port is only up to 12, Port E 16 to 19 do not exist.

 

Someone please verify, thanks.

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