vladimir khusainov

Using the on-chip cache on K70 with uClinux

Discussion created by vladimir khusainov on May 11, 2012

The Kinetis K70 has two separate caches for the total of 16KB of the fast on-chip cache memory. This note explains how the caches are used in Emcraft's port of uClinux to the K70.

First, to present the results first. With the cache enabled we get the following performance figures as tested on Emcraft's K70 System-On-Module (see this link for details). These tests run the K70 at 120Mhz:

o) 112 BogoMIPS reported by the Linux kernel

o) 108272 Dhrystones Per Second, which correspond to about ~44% of the result reported by dhrystone running under the MMU-full Linux on a 250Mhz PowerPC

Here is some technical details.

The K70 MCU has 2 separate caches:

* Code bus cache, for addresses 0x00000000 through 0x1FFFFFFF.
* System bus cache, for addresses 0x20000000 through 0xFFFFFFFF.

Each of the 2 caches is 8 KBytes is size: 8KB = (256 sets) * (16-byte lines) * (2-way set-associative)

The cache essentially is the same memory as the built-in SRAM, from the physical memory perspective. Same access timings as for the built-in SRAM.

When cache is enabled for the DRAM, data is transferred between the DRAM and cache in 16 bytes bursts.

Emcraft's uClinux kernel makes use of both caches as follows:

* Code bus cache enabled in Write-Through mode. This cache is used for the Linux kernel code.
* System bus cache enabled in Write-Back mode. This cache is used as the Linux run-time memory for allocation of dynamic buffers. An implication is that this cache is used both for dynamic kernel data and for user-space processes and loadable kernel modules.

To implement the above architecture the kernel had to be modified to link its code in one address region (0x08000000) while making the kernel believe that its running from a different address region (0x70000000). This required modifications to the kernel linker scripts and also some changes to the core kernel code. The trade-off to this complexity is that both of the two caches are heavily used during the Linux operation resulting in optimal run-time performance.

For those interested in detailed code, Emcraft's U-boot and Linux kernel trees are available at github.com.