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Handling interrupts in HW vector mode for MPC5607B

Question asked by socea emanuel on May 2, 2012
Latest reply on May 18, 2012 by socea emanuel

Hello,

 

I'm familiarizing with the PowerPC family (5607B MCU) by running some examples contained by the AN2865 (MPC5500 & MPC5600 Cookbook) with . There is an example which exemplifies the handling of the interrupts when running in HW vector mode and I managed to make it work fine. In this example 2 interrupts are used -> the PIT1 interrupt which also triggers the  SW interrupt 4.

 

The entries in the interrupt vector table are represented by branch to link instructions to the routines (in this case named Pit1handler and SwIrq4Handler) that are containing the context save & restore (epilog & the prolog) for ISRs.  What I want do is to skip calling the routine for PIT1 and jump directly to the function that is treating the interrupt (in this case, Pit1ISR) when the interrupt request is acknowledged. So I used the __declspec(interrupt) attribute to specify the storage class information  to the compiler in this way:

 

__declspec(interrupt) // SRR enable vle_multiple) void Pit1ISR(void) {  Pit1Ctr++;              /* Increment interrupt counter */  if ((Pit1Ctr & 1)==0) { /* If PIT1Ctr is even*/    INTC.SSCIR[4].R = 2;      /*  then nvoke software interrupt 4 */  }  PIT.CH[1].TFLG.B.TIF = 1;    /* MPC56xxP/B/S: CLear PIT 1 flag by writing 1 */}

By doing this I expected that the compiler will generate the necessary code to prepare the ISR calling and also the context restoring after the ISR has been runned. But I see that the SRR0 and SRR1 registers save and writting to the INTC_EOIR are not performed. Somehow, the compiler treats the function like a interrupt because there is a return from exception (se_rfi) as the last instruction of the ISR, but the specific operations in handling the interrupts are not generated.

 

I have attached the archived project. I use CodeWarrior Eclipse based toolchain, version 10.2.

 

Any help is appreciated. Thank you.

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