Saurabh Arora

RAM Paging in MC9S12XDT512

Discussion created by Saurabh Arora on Apr 12, 2012
Latest reply on Sep 19, 2012 by luck

Hi ,
I am using Freescale's MC9S12XDT512 in one of my projects.

Currently I am using 12K RAM (S12X CPU local map , 0x1000-0x4000) but I need to use 20K RAM which is physically available on SOC.

Through technical manuals I have learnt that for RAM paging I have to write the appropriate page number to RPAGE register.


This will virtually map the 4K page from physically available 20K memory to the 4k page window in CPU local's map.


Now,Could anyone tell me the steps to allow RAM paging.


Also,how does the CodeWarrior facilitates for the same.


Thanks in Advance.