I'm doing some enhancement work on a project using the MC52233 ColdFire V2 MCU; the original development team is gone. It uses the Interniche TCP/IP stack (free version). My question has to do with setting interupt priorities and levels. The 52235 Reference Manual makes it very clear that every enabled interrupt must have a unique level/priority value, e.g., RM section 15.3.6:
" It is the responsibility of the software to program the ICRnx registers with unique and non-overlapping level and priority definitions. Failure to program the ICRnx registers in this manner can result in undefined behavior. ..."
My concern is that the existing code doesn't do this. In particular, all the Fast Ethernet Controller interrupts (sources 23-35) are set with the exact same value: LVL=6, PRI=0. However, the corresponding vector table entries all point to the same interrupt handler, so doest that make this OK? If not, do you have any guidance for how the various interrupt sources should be prioritized? The EPHY interrupt is at LVL=3, is that lower level typical?
Also, can anyone point me to where the Interrupt Sources are listed? In MCF52235RM Rev. 7, in section 18.104.22.168 it refers to Table 15-6, but that is an incorrect reference; there doesn't seem to be any table showing the mapping of interrupt sources into the Interrupt Controller.