AnsweredAssumed Answered

MK60FX512VLQ12 pin out trouble

Question asked by GMVS on Mar 27, 2012
Latest reply on Mar 28, 2012 by Norm Davies

hi

 

this is the first time i work with a freescale device and there are lots of things i dont get

 

for starters, isn't there some other pin out reference other than the one in the datasheet i'm sending? this thing is assuming i know what all that acronyms mean and tho i have a general idea, that doesn't help me to create the adecuate resource map for my application.

 

take this for example

 

• Analog modules
– Four 16-bit SAR ADCs

 

check the index, and it says

 

6.6 Analog...............................................................................43
6.6.1 ADC electrical specifications..............................43
6.6.2 CMP and 6-bit DAC electrical specifications......52
6.6.3 12-bit DAC electrical characteristics...................54
6.6.4 Voltage reference electrical specifications..........57

 

which its useful, but incomplete

 

in the parametric search i read this thing had 16 channels organized in 4 modules

but i dont see that mentioned anywhere in the file. it just says Four 16-bit SAR ADCs

 

so i go down to the pinout

 

and the LQFP diagram is also incomplete

i check the pinout table and most pins aren't labeled according to thir other functions

must of them just say PTEx, PTDx...

but in the table it says for example pin 1:4 are PTE0:3 and are supposed to have something to do with the ADC, SPI1, UART, SDHC and 12C

and i say "something to do", beacuse all i find are the acronyms, no what they are. what're ADC1_SE4a, ADC0_DP1, ADC0_DM1 and why are ADC0_SE8 multiplexed with ADC1_SE8? whatever ADC0_SE8/ ADC1_SE8/ ADC2_SE8/ ADC3_SE8 are all in the freaking same pin 81!

 

oks, drops the file, takes the next one 

 

KQRUG! Kinetis Peripheral Module Quick Reference

Using Peripheral Delay Block (PDB) to Schedule Analog to Digital Converter (ADC) Conversions
19.1 Overview.........................................................................................................................................................................179
19.1.1 Introduction........................................................................................................................................................179
19.1.2 Features..............................................................................................................................................................180
19.2 Configuration example....................................................................................................................................................181
19.2.1 PDB-triggered single-ended ADC conversions.................................................................................................181
19.2.1.1 Turn on ADC and PDB clocks...........................................................................................................182
19.2.1.2 Configure System Integration module for ADC defaults..................................................................182
19.2.1.3 Configure Peripheral Delay Block (PDB).........................................................................................182
19.2.1.4 Determine ADC configuration...........................................................................................................183
19.2.1.5 Using ADC driver..............................................................................................................................184
19.2.1.6 Calibrate ADCs..................................................................................................................................184
19.2.1.7 Enable ADC and PDB interrupts.......................................................................................................184
19.2.1.8 Software triggering of PDB...............................................................................................................184
19.2.1.9 Handle ADC and PDB interrupts.......................................................................................................185

19.2.2 ADC device hardware implementation..............................................................................................................186
19.2.3 PDB device hardware implementation..............................................................................................................186
19.3 PCB design recommendations........................................................................................................................................186
19.3.1 Layout guidelines...............................................................................................................................................186
19.3.1.1 General routing and placement..........................................................................................................186
19.3.2 ESD/EMI considerations ...................................................................................................................................187

 

 

which is freaking useful xept that is a generalization for all kinetis, so it wont tell me whats the pinout of my specific device nor what all the acronyms mean. in fact, the a and b stuff on the names make me think the ADC registers are split into bytes attached to different pins... 

 

no, i dont understand this at all

 

is there some other file i'm missing?

i've been surfing through application notes and schematics (even tower schematics) in case i can infere the info i need, but i dont see anyone using all 16 supposedly available channels at once, and i do need them all.

 

 

 

 

 

can anyone help me?

 

 

tnx

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