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Migration from K60 to K61 platform

Question asked by Evgeni Kosakovski on Mar 7, 2012
Latest reply on Mar 11, 2012 by Evgeni Kosakovski

Hi.

 

I used with TWR-K60 board for develop my project. All SW modules already finished and now I need to move project platform to K61 MCU (this MCU will work in final board). In this project I used with LCD that allowed in LCD demo board, HID keyboard host project (use USB keyboard), I2C, UART, timers and I need to configure K61 MCU for correct work operation of my system.

Can I use with this configuration for K61 without any another changes (in timers configuration, for example, or in LCD, USB HID use). Can I use with CPU function for 100us delay (in Processor Expert for k61 I don't view this function) or I need to configure all peripheries from the beginning?

 

For K60 MCU configuration I used two function (as in keyboard_host project for TWR-K60):

void MCU_Init(void)
{
// Point the VTOR to the new copy of the vector table
SCB_VTOR = (uint_32)___VECTOR_RAM;
//Clear any pending interrupts on USB
NVICICER2|=(1<<9);
//Enable interrupts from USB module
NVICISER2|=(1<<9);

// init pll
PLL_Init();

// SIM Configuration
MPU_CESR=0;
// USB Clock Gating
SIM_SCGC4|=(SIM_SCGC4_USBOTG_MASK);
// PLL/FLL selected as CLK source
SIM_SOPT2 |= SIM_SOPT2_USBSRC_MASK | SIM_SOPT2_PLLFLLSEL_MASK;
// USB Freq Divider
SIM_CLKDIV2=0x02;
// weak pulldowns
USB0_USBCTRL=0x40;
}

and

*****************************************************************************
* It will configure the MCU to disable STOP and COP Modules.
* It also set the MCG configuration and bus clock frequency.
****************************************************************************/
static void PLL_Init()
{
// First move to FBE mode
// Enable all of the port clocks. These have to be enabled to configure pin muxing options, so most code will need all of these on anyway.
SIM_SCGC5 |= (SIM_SCGC5_PORTA_MASK
| SIM_SCGC5_PORTB_MASK
| SIM_SCGC5_PORTC_MASK
| SIM_SCGC5_PORTD_MASK
| SIM_SCGC5_PORTE_MASK );
#ifdef MCU_MK60N512VMD100
// Enable external oscillator, RANGE=0, HGO=, EREFS=, LP=, IRCS=
MCG_C2 = 0;
#else
// Enable external oscillator, RANGE=2, HGO=1, EREFS=1, LP=0, IRCS=0
MCG_C2 = MCG_C2_RANGE(2) | MCG_C2_HGO_MASK | MCG_C2_EREFS_MASK|MCG_C2_IRCS_MASK;
#endif
// Select external oscillator and Reference Divider and clear IREFS to start ext osc
// CLKS=2, FRDIV=3, IREFS=0, IRCLKEN=0, IREFSTEN=0
MCG_C1 = MCG_C1_CLKS(2) | MCG_C1_FRDIV(3);

#ifndef MCU_MK60N512VMD100
// wait for oscillator to initialize
while (!(MCG_S & MCG_S_OSCINIT_MASK)){};
#endif

// Wait for Reference clock Status bit to clear
while (MCG_S & MCG_S_IREFST_MASK){};
// Wait for clock status bits to show clock source is ext ref clk
while (((MCG_S & MCG_S_CLKST_MASK) >> MCG_S_CLKST_SHIFT) != 0x2){};

#ifdef MCU_MK60N512VMD100
MCG_C5 = MCG_C5_PRDIV(BSP_REF_CLOCK_DIV - 1);
#else
MCG_C5 = MCG_C5_PRDIV(BSP_REF_CLOCK_DIV - 1) | MCG_C5_PLLCLKEN_MASK;
#endif
// Ensure MCG_C6 is at the reset default of 0. LOLIE disabled, PLL enabled, clk monitor disabled, PLL VCO divider is clear
MCG_C6 = 0;
// Set system options dividers
SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(BSP_CORE_DIV - 1) | // core/system clock
SIM_CLKDIV1_OUTDIV2(BSP_BUS_DIV - 1) | // peripheral clock;
SIM_CLKDIV1_OUTDIV3(BSP_FLEXBUS_DIV - 1) | // FlexBus clock driven to the external pin (FB_CLK)
SIM_CLKDIV1_OUTDIV4(BSP_FLASH_DIV - 1); // flash clock
// Set the VCO divider and enable the PLL, LOLIE = 0, PLLS = 1, CME = 0, VDIV
MCG_C6 = MCG_C6_PLLS_MASK | MCG_C6_VDIV(BSP_CLOCK_MUL - 24); // 2MHz * BSP_CLOCK_MUL
// wait for PLL status bit to set
while (!(MCG_S & MCG_S_PLLST_MASK)){};
// Wait for LOCK bit to set
while (!(MCG_S & MCG_S_LOCK_MASK)){};
// Transition into PEE by setting CLKS to 0
// CLKS=0, FRDIV=3, IREFS=0, IRCLKEN=0, IREFSTEN=0
MCG_C1 &= ~MCG_C1_CLKS_MASK;
// Wait for clock status bits to update
while (((MCG_S & MCG_S_CLKST_MASK) >> MCG_S_CLKST_SHIFT) != 0x3){};

//return 0;
} //pll_init

 

Thanks.

Evgeni.

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