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Frequency

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Flynn
Contributor I

Ok i hope my english will be clear enough !Also I m new in this forum i'm not sure to be in the good section but it suit pretty well for my problem !

 

My problem is on the MC9S08SH8 which one has an internal oscilator to 40 MHz, well that's what says datasheet but i don't manage to use it !

I mean in lab i only have 2 MHz  for using Timer with bus rate clock ! but in fact someone told me to use it !

So my question is : can we use the 40 MHz frequency (without using external tool) to use with a interruption routine !

And if it's not possible why do the datasheet says there is a 40MHz INTERNAL oscilator !

Hope i'll get help !

Thanks before you answered !

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bigmac
Specialist III

Hello, and welcome to the forum.

 

The internal oscillator that you refer is the DCO (digitally controlled oscillator), which is part of the FLL (frequency locked loop) that may be utilized to generate the bus clock.  The DCO has a control range of 32-40 MHz.  The DCO frequency will be divided down to a lower frequency, to provide the bus frequency (20 MHz maximum).  The minimum division factor is 2.  The division factor may be increased above this using the BDIV setting.

 

An internal reference oscillator is provided to control of the FLL frequency.  This has a trimmable frequency range 31.25 - 39.0625 kHz.  The FLL will lock at a frequency of 1024 times the internal reference frequency (32 - 40 MHz).  The FLL will provide the bus frequency using the internal reference, whenever FEI mode is selected.  This is actually the power-up default mode.

 

Before trimming is applied, the internal reference frequency will be within the approximate range 35kHz +/- 25%, and the default BDIV setting will give a total division factor of 4.  The resulting bus frequency will be about 9 MHz +/- 25%.  The trim value needs to be calibrated for each individual device, to achieve a specific reference frequency.  This calibration is particularly important if you need to operate close to the maximum allowable bus frequency.

 

To achieve 20MHz bus frequency, using FEI mode, the following steps would be required -

  1. During the flash programming process, the internal reference needs to be calibrated for a frequency of 39.0625 kHz.  This is the "non-volatile (NV) trim", and is programmed to a specific flash memory location.
  2. During MCU initialisation, the NV trim setting is read from flash, and written to the normal trim register.  The bus frequency will now be close to 10 MHz.
  3. Now change the BDIV setting from power-up default, to increase the bus frequency to 20 MHz.  This should never be done until after the interal reference frequency has been trimmed.

 

Regards,

Mac

 

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bigmac
Specialist III

Hello, and welcome to the forum.

 

The internal oscillator that you refer is the DCO (digitally controlled oscillator), which is part of the FLL (frequency locked loop) that may be utilized to generate the bus clock.  The DCO has a control range of 32-40 MHz.  The DCO frequency will be divided down to a lower frequency, to provide the bus frequency (20 MHz maximum).  The minimum division factor is 2.  The division factor may be increased above this using the BDIV setting.

 

An internal reference oscillator is provided to control of the FLL frequency.  This has a trimmable frequency range 31.25 - 39.0625 kHz.  The FLL will lock at a frequency of 1024 times the internal reference frequency (32 - 40 MHz).  The FLL will provide the bus frequency using the internal reference, whenever FEI mode is selected.  This is actually the power-up default mode.

 

Before trimming is applied, the internal reference frequency will be within the approximate range 35kHz +/- 25%, and the default BDIV setting will give a total division factor of 4.  The resulting bus frequency will be about 9 MHz +/- 25%.  The trim value needs to be calibrated for each individual device, to achieve a specific reference frequency.  This calibration is particularly important if you need to operate close to the maximum allowable bus frequency.

 

To achieve 20MHz bus frequency, using FEI mode, the following steps would be required -

  1. During the flash programming process, the internal reference needs to be calibrated for a frequency of 39.0625 kHz.  This is the "non-volatile (NV) trim", and is programmed to a specific flash memory location.
  2. During MCU initialisation, the NV trim setting is read from flash, and written to the normal trim register.  The bus frequency will now be close to 10 MHz.
  3. Now change the BDIV setting from power-up default, to increase the bus frequency to 20 MHz.  This should never be done until after the interal reference frequency has been trimmed.

 

Regards,

Mac

 

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Flynn
Contributor I

Ok finally i understood but between you and me i would never search where i found if you didn't put me on the right way thank you so much !

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Flynn
Contributor I

UPDATE :

Ok i just understood some things, the only remaining is the 32.0625 kHz calibrated clock i don't understand how to do that !

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Flynn
Contributor I

Thank you for your help really !

 

Ok i feel noobie now !

I understood the last point which is setted in the ICSC2 reg !

the second point  about the MCU initialisation, is it supposed to be me to do this ? 

And the first i juste don't understand ! the only thing i found is the RDIV bits in the ICSC1 and they are all setled to 0 anyway i don't think i understood this part ! Are there registers or other ?

 

Thanks for your help !

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