Synchronizing DSP5672x ESAIs as well as Rx and Tx

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Synchronizing DSP5672x ESAIs as well as Rx and Tx

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mbunke
Contributor I

Hi,

 

I am using DSP56725 and I want to use the 4 ESAI as following:

ESAI_0: Tx

ESAI_1: Rx

ESAI_2: Tx

ESAI_3: Tx

I also want to have only one set of HCKx_y, SCKx_y and FSx_y pin inputs, distributed to all ESAI inside the DSP.

 

Currently I can connect ESAI_0 and ESAI_1 clocks as well as ESAI_2 and ESAI_3 clocks.

I also found out there is a possibility to connect the ESAI_0 clocks to ESAI_2 as well as ESAI_1 to ESAI_3 using EPSC register (couldn't test it up to now). But it looks like I can only connect receive clocks to another receive clock pins, but I don't see a possibility to connect receive clocks to use it as transmission clocks.

 

Ideas?

 

 

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rocco
Senior Contributor II

Hi Mbunke,

 

Pardon me if what I write is different for the '725 then for the '721. I have not used the '725 yet, but I believe the '721 ESAI is the same.

 

Are you trying to synchronize all transmitters and receivers? If so, then you don't need the receiver's clock generator at all. By setting the SYN bit in each SAICR register, the receivers will be driven from the transmitters' clock and frame-sync.

 

Your post seems to indicate that you want to use one ESAI for receiving and the other three for transmitting. But each ESAI has six transmitters and four receivers (for a total of 24 transmitters and 16 receivers). Are you really using that many channels? If you can combine ESAI_0 and ESAI_1, for example, you can cut your interrupt overhead in half. I'm currently using 7 receivers (14 channels) and 2 transmitters (4 channels), but have then divided between ESAI_0 and ESAI_3. I've yet to use ESAI_1 or ESAI_2. I only have two ISRs per core (one for "left" data and one for "right" data).

 

I did have problems routing my MCLK internally (the datasheet said it "causes synchronization problems"), and had to wire it externally from the EXTAL pin to the two HCKT pins. I did not need to run it to the HCKR pins, as I have the receivers running from the transmitters' clocks (SYN set).

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rocco
Senior Contributor II

Hi Mbunke,

 

Pardon me if what I write is different for the '725 then for the '721. I have not used the '725 yet, but I believe the '721 ESAI is the same.

 

Are you trying to synchronize all transmitters and receivers? If so, then you don't need the receiver's clock generator at all. By setting the SYN bit in each SAICR register, the receivers will be driven from the transmitters' clock and frame-sync.

 

Your post seems to indicate that you want to use one ESAI for receiving and the other three for transmitting. But each ESAI has six transmitters and four receivers (for a total of 24 transmitters and 16 receivers). Are you really using that many channels? If you can combine ESAI_0 and ESAI_1, for example, you can cut your interrupt overhead in half. I'm currently using 7 receivers (14 channels) and 2 transmitters (4 channels), but have then divided between ESAI_0 and ESAI_3. I've yet to use ESAI_1 or ESAI_2. I only have two ISRs per core (one for "left" data and one for "right" data).

 

I did have problems routing my MCLK internally (the datasheet said it "causes synchronization problems"), and had to wire it externally from the EXTAL pin to the two HCKT pins. I did not need to run it to the HCKR pins, as I have the receivers running from the transmitters' clocks (SYN set).

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mbunke
Contributor I

Works fine, thanks!!!

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mbunke
Contributor I

Hi rocco,

 

thank you, I think the "SYN bit" hint is what I need.

You are right, although I cannot use all ESAI receivers and transmitters (725 only has 4 data pins for each ESAI) I will not need to use all ESAIs available. At the moment, I am testing 2-channel input and 4x2-channel output on every core.

 

I'll try SYN bit and tell you if it worked for me.

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