Kirk Humphries

SCI max baud rate?

Discussion created by Kirk Humphries Employee on Jan 27, 2006

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Posted: Thu Nov 3, 2005  6:04 pm

 

I'm pushing numbers around in the SCI module, and have a question. If I set BUSCLK (or SCICLK, same difference) to, say 25 MHz, and set SCIBR to 1, the calculated baud rate is 1.562500 MHz. I don't have any hardware to try this on, so I have to ask: Is this possible in real life? Or is it like the PLL, where you can plug in numbers that can't be achieved in real life?

 


 

Posted: Fri Nov 4, 2005  2:32 pm

 

I think it should be ok. Mean to test it would be:

- to track in on the scope, if you have any

- to use both UART in loop mode, case where you have more than 1 UART.. MC9S12DP512 has two for example

- to enable the SCI loop back, this internally tie rx & tx together, this can be done by hardware also.

 

Be aware that sometime the transceiver, usually a MAX232, does not always support that speed. So for testing, avoid using transiver.

 

I know that Atmel does give this kind of possibilities (something like 2meg/sec) but only work (at least tested by me) on atmel-2-atmel communication.

 


 

Posted: Fri Nov 4, 2005  3:48 pm

 

> I think it should be ok. Mean to test it would be:

> - to track in on the scope, if you have any

> - to use both UART in loop mode, case where you have more than 1 UART..

> MC9S12DP512 has two for example

> - to enable the SCI loop back, this internally tie rx & tx together, this can be done

> by hardware also.

>

 

> Be aware that sometime the transceiver, usually a MAX232, does not always support

> that speed. So for testing, avoid using transiver.

 

Well, I know all that, but as I said, I don't have any hardware yet.

 


 

Posted: Fri Nov 4, 2005  9:00 pm

 

Hi there,

 

Sorry I thought you had a dev board but without a pc or anything to test it.

 

So I did test it myself, more for personal curiosity that anything and it does seem to work.

 

My setup uses a 10 MHz clock with PLL boosting BUSCLK to 22.727272 MHz.

 

Setting SCI0BR to 1 and enabling the internal loop gave expected result.

 

As I said, I'm not quite sure if there is transceiver doing the job at that speed. But for TTL-2-TTL, it is working well.

 


 

Posted: Sat Nov 5, 2005  9:26 pm

 

> So I did test it myself, more for personal curiosity that anything and it does

> seem to work. My setup uses a 10 MHz clock with PLL boosting BUSCLK

> to 22.727272 MHz. Setting SCI0BR to 1 and enabling the internal loop

> gave expected result.

 

OK, thanks for checking for me.

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