Ruth Hendrix

Buffered Output compare on HC08

Discussion created by Ruth Hendrix Employee on Jan 24, 2006
This message contains an entire topic ported from a separate forum. The original message and all replies are in this single message. We have seeded this new forum with selected information that we expect will be of value to you as you search for answers to your questions.
 
Posted: Thu Nov 17, 2005 1:45 pm    
 
Hi Guys,
I am using the MC68HC908GT4 to generate a a 250uS pulse every 250mS. I decided to use the TIM to generate the timming and use channel 0 and channel1 as a buffered output compare. this is the setup code:

void Init_Setup(void){

CONFIG2 = 0x01;
CONFIG1 = 0x09;
PTA = 0x00; //Send all Zeros to PORTA
DDRA = 0xFF; //Make all 8 bits outputs

TSC_PS = 0x05; // the define for this byte may cause problems
TSC0 = 0x38;
TSC1 = 0x0C;

TCH1H = 0x00;
TCH1L = 0x19;

TCH0H = 0x61;
TCH0L = 0xA8;

I think I am missing something here...

I divide the busclk by 32 which gives me 10uS

set CH0 and CH1 as buffered output compare
load counter1 with 25 ( 25 X 10uS = 250uS )
load counter0 register with 25000 (25000 X 10uS = 250uS)
and then go to a endeless loop.
the pin should toggle every time the counter overflows.
do I need to reset the counter every time it overflows?
best regards
Posted: Fri Nov 18, 2005 2:59 am    
 
G'day,

When using buffered output compare, you need to calculate the timer value corresponding to the next change of state, and update TCH0 or TCH1 accordingly, prior to the timer reaching the calculated value. The ELS0A bit within TSC0 would also need to be toggled each time, to represent the next state required. You would probably do this from within a timer interrupt routine.

However, if you want to "set and forget", the use of unbuffered PWM may be a simpler alternative. You would need to adjust the counter modulo register TMOD to give a timer overflow period of 250 milliseconds. Configure TSC0 to clear the output on compare, and to set the TOV0 bit so the output automatically toggles on overflow. Initialize register TCH0 for a pulse width of 250 microseconds.

If your pulse width remains constant, you won't need to use timer interrupts.

Regards,
Posted: Fri Nov 18, 2005 8:07 am    
 
Hi,
thanks for the info, I will try it and let you know.
best regards
Posted: Tue Nov 22, 2005 11:30 am    
 
Hi,
I have tryed what you sujested and, it works but the problem is that is not stable.
I am generating the 250uS pulse every 250ms but it does 3 sets and then as a bigger interval of about 600ms and then another three sets, and so on.
I have disabled Interrupts so that can be rolled out so I am a bit lost...
I am not changing values at all or anything so it should just work...
Any ideas apreciated.
Best regards
Posted: Tue Nov 22, 2005 1:52 pm    
 
G'day,

I assume that you are attempting to use unbuffered PWM - please confirm that this is correct. Could you post your revised code that initializes the timer.

A further thought - is the watchdog timer enabled? If so, is it being cleared at frequent intervals? A watchdog timeout might just explain your current symptoms.

Regards,
Posted: Tue Nov 22, 2005 10:27 pm    
 
Hi,
Sorry about the previous message, what you sujested as worked very well, so well in fact that it is doing exactly what I wanted. I was just mislead by my Digital storage Scope… when set to see the 250 ms it sometimes misses the 250uS pulse because the sampling rate is to low, which explains the gaps without the pulses…
Thanks for your help.
The problem now is that this became a sort of fact finding exercise and I would like also to know how the other three modes also work. I have tried just to get the unbuffered output compare to work, and it did work but I have no control at all. I think I am missing the point of the output compare. I set up the TIM registers to do output compare and to toggle on compare, then I set up the compare value to be 250uS. I also enabled the interrupts on channel 0. may idea of it is every time it reaches the compare value it will toggle the output and also an interrupt will occur. on the ISR routine I reset the TIM counter, and the counter starts again from 0000h, when it reaches the set value it will toggle again and so on.
this would give me a 500ms periode wave. the problem is that the interrupt does not seem to hapen...
Any ideas?
best regards
Posted: Wed Nov 23, 2005 5:17 am  
 
Hello Luis,

Ignoring for a moment why the timer interrupt may not be occurring, I have a problem with what you are trying to achieve with the ISR. If you re-start the timer counter from zero within the ISR, the period of the output would be subject to interrupt latency and so this would degrade timing precision. You do not have a latency issue if you set the TMOD register for the required period.

In fact you can easily generate the square wave output using the previous unbuffered PWM method, by setting TMOD for a period of 500 ms, and setting TCH0 for 250 ms.

The unbuffered output compare (with TOV0 bit clear) could be more useful when you cannot alter the TMOD period, due to other timing constraints, to match the required waveform period. So you use the output compare facility to generate each edge of the output waveform.

If both the 'mark' period and the 'space' period can be less than the TMOD period, this will significantly simplify the code. Also, if the TMOD value can remain at the default value (0xFFFF), the required calculations will be simpler. To generate a square wave output, you would do the following within the timer ISR:

1. Read the current 16-bit value of TCH0.
2. Add the 16-bit value corresponding to a half-period of the output.
3. Write the new 16-bit value to TCH0.
4. Clear the CH0F flag bit.

This assumes that you have previously initialised TSC0 to "toggle output on compare", otherwise you would also need to toggle the state of the ELS0A bit.

For the timer interrupt to occur, you could check the following within your code:

1. The CH0IE bit within TSC0 register is set.
2. The TIM channel 0 vector points at your ISR.

In your previous attempt, could there be any possibility that the TSTOP bit within the TSC register remains set? This is the default state after power-up, so you need to specifically clear the bit to enable the timer.

Regards,

Outcomes