problem jtag swd mxrt1170

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problem jtag swd mxrt1170

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vladimirchernin
Contributor III

Hi!

We developed software for ref board of mxrt1170-EVK.We created board based at EVK design and

we came accross problem with SWD/JTAG debbuger.I can burn and erase external flash memory.

but when i try to load bootloader   using MCUXpresso debbuger i can stop at main function 

and i see wrong value in watch window for example extern

uint32_t __base_NCACHE_REGION;
uint32_t nonCacheStart = (uint32_t)(&__base_NCACHE_REGION);

nonCacheStart value at new board is 0x207dd8 vs EVK value 0x202bffd4

and firmware is faulted at 0xdeadbeef  because of the problem 

SWD dont work properly 

please help us to understant what is going on here ? problem with on chip SDRAM?

 

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kerryzhou
NXP TechSupport
NXP TechSupport

Hi @vladimirchernin 

 Do you define your NCACHE_REGION to the SDRAM area?

 Seems you debug the code using the SDRAM, what's the debugger you are using? As i know, if related to the SDRAM, the debugger also need to contains the scrypt which configure the SEMC, othewise, it will have issues.

 BTW, do you try to download some simple code, eg led_blinky to your customer board, whether that works.

About the SDRAM, I think you also can test it direct, just your SDRAM works or not at first, SDK contains the semc code.

 

Wish it helps you!

Best Regards,

Kerry

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vladimirchernin
Contributor III

Hi!

We found out VDD_SNVS_DIG os 0.

The VDD_SNVS_DIG  output is in the  SNVS domain coming from VDD_SNVS_IN; it's a hardware connection and is generated by the internal LDO.

What can be a reason from  VDD_SNVS_DIG?  our board is based on NXP ref board

another VDDs looks ok 

Thanks

Vladimir

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741 Views
kerryzhou
NXP TechSupport
NXP TechSupport

Hi @vladimirchernin 

  For the new hardware question, please create the new question post about it, thanks.

  Then we will help you in your new question post.

Best Regards,

Kerry

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