imxrt 1062 PWM Continuous Capture - Counter Reset

[ckhassan]

Hello,

QUESTION:

When using the imxrt 1062 ePWM in continuous capture mode, is it possible to configure the pwm submodule in such a way that the pwm channel's counter "automatically" resets, so I don't have to continuously monitor for counter rollovers.

Is this possible, or is there another way to handle it that won't impact the system's speed?

DETAILS:

1. I'm capturing pulses, from the rising edge to the falling edge.  (The signal is 20kHz, 50% duty cycle, so the pulse width of interest is 25us.  The pulse width will decrease to sub-microsecond values in the future, so speed is critical.)

3. Right now (during development) I'm using the pwm DMA to capture 13 pulses to a buffer, and then I stop the capture.  (I'll have to capture an "inifinite" number of pulses in the future.)

4. Currently, after capturing my 13 pulses and examining the content of the buffer, I can see that the pwm counter never resets, so at some point it rolls over which would result in a pulse width that is incorrect.  I'd like to avoid having to monitor for and process roll overs by configuring the pwm hardware to reset itself (or something along those lines).

Any help or suggestions would be greatly appreciated.

Thank you,

Chris 

[FelipeGarcia]

Hello Chris,

When using input capture mode you can use the EDGCMP register. When the counter output equals EDGCMP, the value of the submodule timer is captured and the counter is automatically reset. This feature allows the module to count a specified number of edge events and then perform a capture and interrupt.

Best regards,

Felipe

[ckhassan]

Hello Felipe,

Thank you for the reply, but that's not quite how I need it to work.

I need to capture and operate on every pulse width, which I could do, but the problem I was having was that the PWM counter was not resetting at each capture, so it kept counting up and eventually rolled over which sometimes results in a negative pulse width.

For example, let's assume:

1. The counter counts from 0 to 65535 and then rolls over and continues counting.

2. A stream of positive pulses with a width of 1000 is being captured continuously.

Let's say the first pulse rising edge is captured when the counter is at 64000 and the falling edge is captured when the counter is 65000.  The pulse width is 65000 - 64000 = 1000, which is correct.

Let's assume the rising edge of the next pulse is captured when the counter is 65500, then in theory the falling edge would be captured when the counter is 66500.  The counter can't count that high, and will therefore roll over and continue counting.  So, the counter value when the falling edge occurs will be something like 65500-65535 = 965.  And the reported pulse width will be 965 - 65500 = -64535.

HOW TO "FIX" ROLL OVER IN THE HARDWARE (for maximum speed):

I realize this can be handled in software, however, time is of the essence, and I was looking for a way to have the hardware handle it automatically, and I found that the key to making this happen is by using the FORCE_SEL bits in the pwm SMxCTRL2 register.

I learned that when the FORCE OUTPUT signal is asserted, it initializes the counter, which means that the value written to the INIT register is loaded into the counter.  Thus, if 0 is written to INIT, then on every FORCE OUTPUT assertion, the counter's count value is set to 0.  So, selecting an appropriately configured FORCE OUTPUT source using the FORCE_SEL bits will reset the counter on each pulse width capture and as long as the pulse widths don't exceed the maximum count time of timer, then the roll over issue doesn't happen.

That brings me to the issue I'm currently trying to resolve, but I'll post that as another question along with the pertinent information.

Thank you,

Chris