imxRT1062 speed CPU

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imxRT1062 speed CPU

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joandelatorre
Contributor II

I have imx.RT1062 CPU in a develper board MIMXRT1060-EVK, with last version Xpresso v10.3.0 and last MCUXpresso config 5.0.

The problem is the speed of executation, I need a faster application.

I test the speed of two assembler instruction to toggle and output pin.

        __asm("STR.W R2,[R3,#140]");
        __asm("STR.W R2,[R3,#140]");

CPU is config with 600MHz, and 150MHz

The program is in SRAM_ITC and data in SRAM_DTC. (faster allocation speed )

     BOARD_FLASH:          0 GB         8 MB      0.00%

        SRAM_DTC:       26348 B       128 KB     20.10%

        SRAM_ITC:       16304 B       128 KB     12.44%

         SRAM_OC:          0 GB       768 KB      0.00%

     BOARD_SDRAM:          0 GB        32 MB      0.00%

But the signal need 80nS to change.

pastedImage_1.png

How is possible one 32 bits instruction (in theory 1 cicle CPU) need 80nS, when 600MHz is a 1.66nS or 150MHz (6.66ns cycle)?.

I read that GPIO clock is 150MHz (6.66nS cycle) maximum but how affect?.

The CPU MK66 at 150MHZ is faster.

pastedImage_2.png

When I execute the pc register is in 0x20000000 (SRAM_DTC) and not in 0x00000 (SRAM_ITC) segment. Why?.

pastedImage_3.png

pastedImage_4.png

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victorjimenez
NXP TechSupport
NXP TechSupport

Hello Joan,

Regarding your question:

When I execute the pc register is in 0x20000000 (SRAM_DTC) and not in 0x00000 (SRAM_ITC) segment. Why?

This is due to the priority of the memories in the MCU settings. You need to put the SRAM_ITC memory on top of the SRAM_DTC, like the following:

pastedImage_5.png

Regarding the speed behaviors, you are facing I will make some tests on my side and let you know the results ASAP.

Something that got my attention is the screenshot of the oscilloscope that you attached. I supposed the blue signal is the pin that you are toggling, but why this signal is not constant?

pastedImage_6.png

Regards,

Victor.

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victorjimenez
NXP TechSupport
NXP TechSupport

Hello Joan,

The A1 silicon has a new GPIO toggle feature. Try the toggle with the new register DR_TOGGLE and you should get better performance.

Best regards,

Victor.

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victorjimenez
NXP TechSupport
NXP TechSupport

Hello Joan,

I have an update regarding your question. The RT1060 has 124 tightly coupled GPIOs, enable to be accessed with high frequency. 

Note: the output rate is limited by the drive strength and the loading of the pin.

It provides two set of GPIOs registers to control pads output. GPIO1 to GPIO3 are general GPIOs, and GPIO6to GPIO8 are tightly GPIOs, but they share the same pad, that means the gpio pin can select from GPIO1/2/3 to GPIO6/7/8. The registers IOMUXC_GPR_GPR26, IOMUXC_GPR_GPR27, and IOMUXC_GPR_GPR28 are for GPIO selection.

The clocks for the GPIOs are described in Table 13.5 of the RM - notice that the GPIO1,2,3, and 4 are sourced from ipg_clk_root and GPIO6,7,8, and 9 are sourced from ahb_clk_root.

gpio_clocks.png

The pins tool offers you the option of choosing between the normal GPIO and the Fast GPIO. 

gpio_pins_selection.png

When selecting this pin and writing to the register mentioned before (DR_TOGGLE) you will get an amazing improvement in the speed of the GPIO. 

Best regards,

Victor.

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