i.MXRT LPSPI Glitching High-Active Chip Select

[TomE]

I'm using the NXP LPSPI Sample Code.

It is the same as the code found here:

mbed-os/fsl_lpspi.c at master · ARMmbed/mbed-os · GitHub 

The problem happens when an LPSPI channel is configured with a high-active Chip Select (kLPSPI_PcsActiveHigh). When enabled it glitches HIGH for 750us prior to the first transfer.

This is because the following code enables the chip select pin, which defaults to low-active, so sets it HIGH. THEN it sets it to high-active, so sets it LOW again:

void LPSPI_MasterInit(LPSPI_Type *base, const lpspi_master_config_t *masterConfig, uint32_t srcClock_Hz)
{
    ... 

    /* Reset to known status */
    LPSPI_Reset(base);

    /* Set LPSPI to master */
    LPSPI_SetMasterSlaveMode(base, kLPSPI_Master);

    /* Set specific PCS to active high or low */
    LPSPI_SetOnePcsPolarity(base, masterConfig->whichPcs, masterConfig->pcsActiveHighOrLow);
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Swapping the last two function calls fixes the problem.

Tom

[art]

Thank you for sharing your insights.

Best Regards,

Artur