I tried to study evkmimxrt685_flexspi_psram_polling_transfer example with the goal to attach FPGA to flexSPI in the next step.To test flexSPI output I attached digital probes of my oscilloscope to flexSPI bus and have caught bus activity that corresponds to execution of function "flexspi_hyper_ram_ahbcommand_write_data()" and should write 1kB of data to PSRAM starting with zero address. In fact, this function just realizes copy of 1kB block from RAM to special RAM addresses linked with flexSPI using the command memcpy(startAddr, buffer, length); I did not modify the example at all. Thus, I suppose that all LUT were configured properly. However, in Octal SPI bus instead of expected write command (0xA0) I see read command (0x20). I don't understand why this happens. The read command induced by the command memcpy(buffer, startAddr, length); looks correct in Octal SPI. Any thoughts about possible reasons of unexpected bus activity are highly appreciated!
The breakpoints to catch bus activity were set properly as it is seen from the attached screenshot.
The oscilloscope screen shots show two commands of transmission 2x 512 bytes. The first with zero address, and the second from the address 512 as it should be. However, instead of 0x20 there should be 0xA0 in accordance with PSRAM datasheet. And this is the problem. In the oscilloscope screenshots channels D0-D7 is the bus from least significant bit to the highest, D8 is Chip Select, D9 is clock, and D10 is returned by PSRAM clock called Data strobe (DQS) for data reading syncing.
