i.MX RT1060 Boot using FlexSPI

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i.MX RT1060 Boot using FlexSPI

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nick_j
Contributor III

Hi,

I am trying to boot from external flash using Serial NOR Flash Boot via FlexSPI. I have confirmed that the flash is in working order through debugging, however I am unable to boot from the flash.

I am using NXP MCU BootUtility v2.4.0 to program the flash in serial downloader mode using the evkmimxrt1060_xip_boot_header_dcd.bin DCD provided and my application image file (.s19). Once programmed I can view the bootable image back within the BootUtility so I assume all is well in that respect.

When actually booting however the main application doesn't run. Following Figure 9-1. Boot flow in the reference manual I think it's getting stuck at the "Download initial boot image stage"

BootFlow.png

Probing the pins on the flash device, I can see activity on the clock, DQ0 and DQ1 pins. The clock frequency is 30MHz so it must be somewhere in the FlexSPI Serial NOR Flash Boot Operation. It seems to be in a loop at this stage however and doesn't progress any further.

nick_j_0-1615310566733.png

When testing through debugging, I had to change the number of dummy cycles in the read command of the FlexSPI LUT so that the i received the correct data. If this is the same issue, is there any way to edit the LUT at this point in order to read the image correctly into OCRAM?

Thanks,

Nick

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16 Replies

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kerryzhou
NXP TechSupport
NXP TechSupport

Hi nick_j,

  What's external QSPI flash you are using?

  Do you use the external SDRAM? because the DCD is used for the SDRAM.

 Whether this board is the customer board?

  If yes, do you run this code:

\SDK_2.9.1_EVK-MIMXRT1060\boards\evkmimxrt1060\driver_examples\flexspi\nor\polling_transfer

  Run it from the internal RAM, and test it, whether you can finish all the flash read, write and erase function?

  If yes, when you download the code successfully in the serial download mode, and you want to boot, do you modify the boot mode to the internal boot mode?

  Please give me the updated information.

Best Regards,

Kerry

 

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nick_j
Contributor III

Hi Kerry,

What's external QSPI flash you are using?

 - Using Micron Serial NOR Flash Memory (MT25QL128ABA), has the same pin footprint as ISSI part on the evk board

 

Do you use the external SDRAM? because the DCD is used for the SDRAM.

We are not using SDRAM

 

Whether this board is the customer board?

 - It is a custom board

 

If yes, do you run this code:

\SDK_2.9.1_EVK-MIMXRT1060\boards\evkmimxrt1060\driver_examples\flexspi\nor\polling_transfer

Run it from the internal RAM, and test it, whether you can finish all the flash read, write and erase function?

 - I have run the code from the example in boards\evkmimxrt1060\component_examples\flash_component\flexspi_nor, where it does complete all read, writes and erases, but only after altering the Rx clock source to be internal loopback instead of loopback from DQS pad, and the read command dummy cycles is changed from 9 to 8.

 

If yes, when you download the code successfully in the serial download mode, and you want to boot, do you modify the boot mode to the internal boot mode?

 - Yes, modifying to internal boot, although fuses have been burnt so booting through fuses

 

Hope this helps

Thanks,

Nick

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kerryzhou
NXP TechSupport
NXP TechSupport

Hi nick_j,

   Thanks for your updated information.

    If you don't use the SDRAM, you don't need to add the dcd.

    If it is your customer board, do you connect the DQS pin to other function, normally, we need the DQS pin as float, otherwise, you need to configure DQS loop from internal side, and the FCBC XIP have the 60Mhz limit:

kerryzhou_0-1615440694834.png

#if defined(XIP_BOOT_HEADER_ENABLE) && (XIP_BOOT_HEADER_ENABLE == 1)
#if defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__)
__attribute__((section(".boot_hdr.conf"), used))
#elif defined(__ICCARM__)
#pragma location = ".boot_hdr.conf"
#endif

const flexspi_nor_config_t qspiflash_config = {
.memConfig =
{
.tag = FLEXSPI_CFG_BLK_TAG,
.version = FLEXSPI_CFG_BLK_VERSION,
.readSampleClksrc=kFlexSPIReadSampleClk_LoopbackFromDqsPad,//kFlexSPIReadSampleClk_LoopbackInternally
.csHoldTime = 3u,
.csSetupTime = 3u,
.sflashPadType = kSerialFlash_4Pads,
.serialClkFreq = kFlexSpiSerialClk_100MHz,// This part should smaller than 60Mhz
.sflashA1Size = 8u * 1024u * 1024u,
.lookupTable =
{
// Read LUTs
FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18),
FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x06, READ_SDR, FLEXSPI_4PAD, 0x04),
},
},
.pageSize = 256u,
.sectorSize = 4u * 1024u,
.blockSize = 64u * 1024u,
.isUniformBlockSize = false,
};

Please check your PCB, DQS pin connection.

Any updated information, please kindly let me know.

Kerry

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4,064 Views
nick_j
Contributor III

Hi Kerry,

I made the changes to the qspiflash_config like you said but am still having no luck. Even when trying XIP over JTAG the application does not run. I was wondering if perhaps my project configuration might not be correct and if you could provide some insight into the following?

Could the linker scripts be configured incorrectly? What is the expected configuration for the linker script?

Is there any way to debug during boot in order to determine what the issue could be?

Is there any way to determine in the flash has been read correctly?

Thanks,

Nick

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4,056 Views
kerryzhou
NXP TechSupport
NXP TechSupport

Hi nick_j,

   What's the DQS pin you are using now? Still not float and use other function?

   If yes,  please share me your xip folder flexspi_nor_config_t qspiflash_config .

   I need to check it.

   What's the BOOT_MODE you are using? You need set it as internal BOOT mode.

   BOOT_MODE[1:0] = 10, internal boot

   When you use the debugger to download the app to your flash, whether it is downloaded successfully?

  Which app you are using? You can try the SDK led_blinky project.

  Seems your MT25QL128ABA QE bit position is special.QE is used to enable the quad mode.

 In you .memConfig, please add this code:

.deviceModeType = 1,

 Then try it again.

  

 

  Any updated information, kindly let me know.

Best Regards,

Kerry

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4,036 Views
nick_j
Contributor III

Hi Kerry,

The DQS pin is not floating, so still using internal loopback.

The updated flexspi_nor_config_t qspiflash_config is:

const flexspi_nor_config_t qspiflash_config = {
   .memConfig =
   {
      .tag = FLEXSPI_CFG_BLK_TAG,
      .version = FLEXSPI_CFG_BLK_VERSION,
      .deviceModeType = 1,
      .readSampleClksrc=kFlexSPIReadSampleClk_LoopbackInternally,
      .csHoldTime = 3u,
      .csSetupTime = 3u,
      .sflashPadType = kSerialFlash_4Pads,
      .serialClkFreq = kFlexSpiSerialClk_30MHz,
      .sflashA1Size = 8u * 1024u * 1024u,
      .lookupTable =
      {
      // Read LUTs
      FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18),
      FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x06, READ_SDR, FLEXSPI_4PAD, 0x04),
      },
   },
   .pageSize = 256u,
   .sectorSize = 4u * 1024u,
   .blockSize = 64u * 1024u,
   .isUniformBlockSize = false,
};

With the current changes I am still not having success. I am wondering if the LUT table should be edited to match the Fast Read command that I have successfully used to read the flash previously?

I am setting to internal boot, however the BT_FUSE_SEL fuse has been burnt and so boot options are controlled by the eFUSEs. 

When downloading the app to flash it is successful, and I have been using the led_blinky project.

Thanks,

Nick 

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4,026 Views
kerryzhou
NXP TechSupport
NXP TechSupport

Hi nick_j,

 Can you use the polling_transfer to readout your MT25QL128ABA Nonvolatile configuration register?

 Your quad mode should not be enabled, then the boot quad fast read didn't work.

   You can find from MT25QL128ABA datasheet:

kerryzhou_0-1615861919514.png

Nonvolatile Configuration Register
This register is read from and written to using the READ NONVOLATILE CONFIGURATION
REGISTER and the WRITE NONVOLATILE CONFIGURATION REGISTER commands,
respectively. A register download is executed during power-on or after reset,
overwriting the internal configuration register settings that determine device behavior.
A WRITE NONVOLATILE CONFIGURATION REGISTER command to a reserved setting
is ignored, flag status register bit 1 is set, and the write enable latch bit is cleared.

kerryzhou_1-1615862306238.png

You need to enable the quad mode.

BTW, in your led_binky code, please also try this LUT instead of the fast quad read:

/* Normal read mode -SDR */
FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x03, kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_1PAD, 0x18),
FLEXSPI_LUT_SEQ(kFLEXSPI_Command_READ_SDR, kFLEXSPI_1PAD, 0x04, kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0),

.lookupTable =
{
// Normal read mode -SDR

FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x03, RADDR_SDR, FLEXSPI_1PAD, 0x18),
FLEXSPI_LUT_SEQ(READ_SDR, FLEXSPI_1PAD, 0x04, STOP, FLEXSPI_1PAD, 0),
},

 

This will just use signal wire to read, not the quad mode.

You can try it, just make sure it is your quad enable issues.

Or you can try to write your Nonvolatile configuration register to enable the quad mode.

 

Any updated information, please kindly let me know.

Best Regards,

Kerry

 

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nick_j
Contributor III

Hi Kerry,

Reading the Non-Volatile configuration register returns all default values (0xFFFF).

Changing the LUT of the led_blinky project from 4-PAD to 1-PAD didn't have an effect, it is still not booting.

Thanks,

Nick

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kerryzhou
NXP TechSupport
NXP TechSupport

Hi nick_j

    Do you have MIMXRT1060-EVK on your side? If yes, can you replace the on board QSPI chip to your own chip, and try the progress again, whether that works or not?

   If still not work, I will try to find your QSPI chip and test it on my MIXMRT1060-EVK board.

   Any test result on your side, please kindly let me know.

Best Regards,

Kerry

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3,989 Views
nick_j
Contributor III

Hi Kerry,

I've not been able to test the Micron part on the evk yet, but I do have a question about the persistent bits section of the boot process. 

"During boot, the core's behavior is defined by the boot mode pin settings, as described in
Boot mode pin settings. When waking up from the low-power boot mode, the core skips
the clock settings. The boot ROM checks that the PERSISTENT_ENTRY0 (see
Persistent bits) is a pointer to a valid address space (OCRAM). If the
PERSISTENT_ENTRY0 is a pointer to a valid range, it starts the execution using the
entry point from the PERSISTENT_ENTRY0 register. If the PERSISTENT_ENTRY0 is
a pointer to an invalid range, the core performs the system reset."

As I said in my original post, "It seems to be in a loop at this stage however and doesn't progress any further", could this be a persistent entry point issue that we're not pointing to the correct location?

I do have a custom board with the ISSI flash part instead but still seem to get the same results as we had with the Micron part.

Thanks,

Nick

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3,946 Views
kerryzhou
NXP TechSupport
NXP TechSupport

Hi nick_j,

  Thanks for your updated information.

   Now, please help to check, whether you have the SWD interface?

  As your customer board even use the ISSI chip which is the same as the EVK, still has this issues, then it may related to your boot. 

  JTAG_MOD has the external 10k pull-down or NOT?

kerryzhou_0-1616467940326.png

  If you have the SWD interface, please use the JLINK commander, to run it, and halt it, check the SP PC address, whether it is in the ROM or the flash address.

  If you have the JLINK, please try it.

  About the app code, in fact, if you use the SDK led_blinky, that must can work, the boot has no issues.

 But, if you already download some wrong app code, then it will have the boot issues, now can you download the new code with the debugger? Can you debug the code?

Best Regards,

Kerry

 

 

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nick_j
Contributor III

Hi Kerry,

Thank you for all the suggestions, we discovered yesterday that it was an issue with the linker script settings. I had been setting to "Link application to RAM" or "Plain load image" when loading into flash, turns out that having neither options ticked was what was needed. So loading iled_blinky project works perfectly fine running from flash.

However, with the actual project there still seems to be an issue. I created a fresh c++ project and added all the drivers that I required and also added some later on as well. Do you know of any particular settings that I might need to check in order to get it running on flash? I'm currently looking at the "Tensorflow" examples as they are c++ based to see if there are any differences between them and my project.

I'm sorry that it took so long to find what turned out to be a very simple issue, and I fully appreciate all the time you've put aside to help me.

Thanks,

Nick

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kerryzhou
NXP TechSupport
NXP TechSupport

Hi nick_j,

    Thanks so much for your updated information.

    So, if you use the SDK related code to download to the flash, totally works.

    Just when you use your own tensorflow code, it has the issues right?

    If yes, please check your code, please note, you need to put your code from 0X60002000, 0x60000000 need to add the FCBC, 0x60001000 is the IVT, and DCD.

   If your tensforflow use the SDRAM, you also need to add the DCD code.

 

Wish it helps you!

Best Regards,

Kerry

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3,899 Views
nick_j
Contributor III

Hi Kerry,

It seems that we have solved the issue at last!

Our custom project clock configuration wasn't set up correctly, and we also needed XIP_EXTERNAL_FLASH to be defined also so that FlexSPI clock configuration wasn't changed as well.

Thank you for taking your time to help solve this issue, it is greatly appreciated. Hopefully we won't have any more issues.

Thanks again,

Nick

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vhari
Contributor I

Hello Nick,

Can you tell me where you had to define the XIP_EXTERNAL_FLASH? Can you share the code snippet?

Best Regards.

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kerryzhou
NXP TechSupport
NXP TechSupport

Hi nick_j,

  Really glad to hear your solve it.

  Yes, if download to the external flash, must set XIP_EXTERNAL_FLASH.

  If you have any question in the future, welcome to create the new case.

  This post, please help to mark the correct answer to close it, thanks.

 

Best Regards,

kerry

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