how to setup AXI interconnect (NIC-301) fot i.mxrt1050?

[sergio19]

Hi.

Is there information how to configure priorities of AXI bus masters?

We suppose that DMA channel lose arbitration accessing the memory and undesirable stalls happen.

Unfortunatelly I did not have an expirience to program the IP (NIC-301) at all.

In general AXI bus uses QOS signal to prioritisize accesses. But how to use this feature for i.mx rt and is it possible at all? May be the QOS should be programmed in master (DMA) and not in the interconnect IP. I did not  find this in the RM.

May be some AXI statistics available and can be read back to check the access time?

Help me find documentation or/and code examples related to the topic.

Thanks, Sergey.

[shingoishida]

Hi,

According to the RT1050 Reference Manual, the i.MX RT1050 uses the Arm AXI bus, so please refer to the Arm documentation for details.

i.MX RT1050 Processor Reference Manual, Rev. 5, 09/2021

-p1809: Chapter 29 Network Interconnect Bus System (NIC-301)

CoreLink Network Interconnect NIC-301 Technical Reference Manual

https://developer.arm.com/documentation/ddi0397/i/

Also, according to the thread below, there is no sample code for customization NIC-301.

https://community.nxp.com/t5/i-MX-RT/I-MXRT-MIMXRT1050-NIC-301-Optimal-Setup/m-p/830012

There is another thread that may be relevant to your question. The issue is with other peripherals, but I believe the priority assignment can be done the same way.

https://community.nxp.com/t5/i-MX-RT/iMXRT1052-LCD-Screen-shifted/m-p/1069978

 Thank you.