What type of reset is WatchDog capable of? The POR reset or onely the COLD reset?

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What type of reset is WatchDog capable of? The POR reset or onely the COLD reset?

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cerma
Contributor IV

Hi,

I do not understand the exact meaning of the SRE and WDT bits in the i.MXRT106x Reference manual.
1 - What is the meaning of bite SRE? What does the phrase "using a new way to generate a software reset" mean. What is the "new way"?
2 - When I set WDT = 1, WDA = 0, SRE = 0 bit, does WatchDog perform the COLD reset and then the POR reset. When I set WDT = 0, WDA = 0, SRE = 0 bit, does WatchDog only perform the COLD reset?
Figure 57-4 shows me that I only need to set the WDT bit. Clear WDA and SRE bit. Then it will be done POR reset. Am I right?

Thank you.

Regards

Jaroslav C.

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kerryzhou
NXP TechSupport
NXP TechSupport

Hi cerma,

   Answer your two questions:

1 - What is the meaning of bite SRE? What does the phrase "using a new way to generate a software reset" mean. What is the "new way"?

Answer: I also didn't find more information about this content, but from the description, I think it is related to the internal design, when the SRE=1, then watchdog will generate a more robust software reset than the original, but to the function, it should be the same, just SRE=1 is more robust.


2 - When I set WDT = 1, WDA = 0, SRE = 0 bit, does WatchDog perform the COLD reset and then the POR reset. When I set WDT = 0, WDA = 0, SRE = 0 bit, does WatchDog only perform the COLD reset?
Figure 57-4 shows me that I only need to set the WDT bit. Clear WDA and SRE bit. Then it will be done POR reset. Am I right?

Answer:

   From the RM Figures:

image.png

WDT = 1 will also generate the POR reset, but WDT=0, although has the system reset, but not the por reset. So, I think your understanding is correct, if you also want to do the POR reset, you can set the WDT=1.

 

Wish it helps you!

If you still have questions about it, please kindly let me know!

Best Regards,

Kerry

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cerma
Contributor IV

Hi Kerry,

Thank you for your answer.
I was interested in a more detailed description of the SRE bit. If the "new way" has an effect on consumption, in which cases is the "new way" durable, etc ..?

Best Regards,

Jaroslav C.

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kerryzhou
NXP TechSupport
NXP TechSupport

Hi cerma,

   Answer your two questions:

1 - What is the meaning of bite SRE? What does the phrase "using a new way to generate a software reset" mean. What is the "new way"?

Answer: I also didn't find more information about this content, but from the description, I think it is related to the internal design, when the SRE=1, then watchdog will generate a more robust software reset than the original, but to the function, it should be the same, just SRE=1 is more robust.


2 - When I set WDT = 1, WDA = 0, SRE = 0 bit, does WatchDog perform the COLD reset and then the POR reset. When I set WDT = 0, WDA = 0, SRE = 0 bit, does WatchDog only perform the COLD reset?
Figure 57-4 shows me that I only need to set the WDT bit. Clear WDA and SRE bit. Then it will be done POR reset. Am I right?

Answer:

   From the RM Figures:

image.png

WDT = 1 will also generate the POR reset, but WDT=0, although has the system reset, but not the por reset. So, I think your understanding is correct, if you also want to do the POR reset, you can set the WDT=1.

 

Wish it helps you!

If you still have questions about it, please kindly let me know!

Best Regards,

Kerry

-------------------------------------------------------------------------------

Note:

- If this post answers your question, please click the "Mark Correct" button. Thank you!

 

- We are following threads for 7 weeks after the last post, later replies are ignored

Please open a new thread and refer to the closed one, if you have a related question at a later point in time.

-----------------------------------------------------------------------------

 

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dh1
Contributor II

Hello

I tried this because we want to re-latch the BOOT_MODE pins without having to make a power cycle.

But it seems this is not a real POR and the BOOT_MODE setting stays the same as before.

Do you confirm this? Is there any possible way to re-latch the BOOT_MODE pins without having to make a power cycle to the CPU?

Thanks and regards,
Daniel

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