Two SPI communications on FlexIO2

[davidouatt08]

Hello,

I am using FlexIO2 on iMXRT1050 in order to have two independant SPI communications. The signals needed are, for both buses, SCLK and MISO.

Using only one SCLK clock signal with two MISO input signals works well.

Tried to make it work as two pairs (SCLK + MISO) but it doesn't work for the moment. The configuration is :

• GPIO_B0_02 : SCLK1 with timerIndex[0] trigger on both edges of MISO1
• GPIO_B0_01 : MISO1 with shifterIndex[1]
• GPIO_B1_02 : SCLK2 with timerIndex[1] trigger on both edges of MISO2
• GPIO_B1_01 : MISO2 with shifterIndex[0]

Is it possible to have some support on this issue?

Regards

[davidouatt08]

Hi Kerry,

I already analyzed the signals for a couple of days before coming to the forum, as you can see in my first mail.

The SPI communication works (with a single FlexIO2) with one SCLK for two MISO signals, but I can't get working with two SCLK for two MISO.

Is this configuration (two pairs of SPI buses, each one consisting of one SCLK plus one MISO) possible with only one FlexIO?

Thanks for your help

[kerryzhou]

Hi David OUATTARA,

   So sorry for my later reply, there are really a lot of cases in the queue, anyway, I provide the deep support for you now.

  Normally, when use FlexIO to generate the SPI master mode need to use two timers, two Shifters and four pins.

  2 Shifters: one shifter is used as the data transmitter and the other shifter is the receiver.
  2 Timers: one timer is used for the SPI_CS output generation, and the other timer is used for the load/store/shift control of the two shifters and SPI_SCK generation.
  4 Pins: these are used as SPI_CS, SPI_SCK, SPI_MOSI, and SPI_MISO.

But if you don't need to use the SSEL and the MOSI pin, you just need to use one timer, and two pins.

You can use just one FlexIO(FlexIO2) to generate two independent SPI master mode.

Now, please check the code and hardware side.

1. Code side.

    You can refer to our SDK code for RT1050, eg:

SDK_2.5.0_EVKB-IMXRT1050\boards\evkbimxrt1050\driver_examples\flexio\spi\int_lpspi_transfer\master

  Please note, if you want to use two independent SPI master mode, please define two variable:  FLEXIO_SPI_Type spiDev1; FLEXIO_SPI_Type spiDev2;

  I find you define two SPI master in one spiDev, actually, one FlexIO_SPI_Type for one SPI:

typedef struct _flexio_spi_type
{
    FLEXIO_Type *flexioBase; /*!< FlexIO base pointer. */
    uint8_t SDOPinIndex;     /*!< Pin select for data output. */
    uint8_t SDIPinIndex;     /*!< Pin select for data input. */
    uint8_t SCKPinIndex;     /*!< Pin select for clock. */
    uint8_t CSnPinIndex;     /*!< Pin select for enable. */
    uint8_t shifterIndex[2]; /*!< Shifter index used in FlexIO SPI. */
    uint8_t timerIndex[2];   /*!< Timer index used in FlexIO SPI. */
} FLEXIO_SPI_Type;

So, please separate it in your code.

Please refer to our SDK sample code on your side.

2. Hardware side.

   Do you have two slaves on your side? If you are using two master, please use two slave, one master connect to one slave.

  Please also test the SPI bus wave, and share it with me if you have problems, don't just give me the slave datasheet wave, that's not enough.

If you still have problems, please also share your test project to me, and the SPI bus wave, and the test result to demonstrate it can't work.

When you share the test project, please also tell me the IDE you are using.

Then I will help you to check the details.

Have a great day,
Kerry

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[davidouatt08]

Hi Kerry,

Thanks for your reply.

I want to realize two SPI communications in Master Mode. indeed, the iMXRT generates the SCLK signal while reading the data on MISO (no MOSI and no NCS signals).

The SPI bus waveform is the one of the component ADS1222. Following is the link to the component datasheet 

http://www.ti.com/lit/ds/symlink/ads1222.pdf 

You can find the waveform on page 14

Regards 

[kerryzhou]

Hi David,

   Please find a logic analyzer to test the SPI bus wave, associated with the SPI wave will be more easy to check the problems.

Have a great day,
Kerry

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[kerryzhou]

Hi David OUATTARA,

   Could you tell me what the SPI mode you want to realize, master or slave?

   BTW, can you share the SPI bus wave for the two problem SPI interface?

Have a great day,
Kerry

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