Set pin low every timer interval in hardware

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Set pin low every timer interval in hardware

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karl_fraasch
Contributor III

I am interfacing to an external ADC using the RT1064. The particular ADC supports a "Request" pin which allows the user to pull the pin low to request an ADC sample. The software will then set the pin high once the sample is read using SPI.

My preference is to trigger the request pin entirely in hardware, to guarantee a precise sampling rate.

I have experimented using the PIT routed to the XBAR to trigger an IOMUX pin. While I am able to trigger a pulse at my desired rate, the pulse matches the shape of the PIT trigger. What I need is to pull the pin low every time the timer triggers. Software will then take care of setting the pin high once the operation is complete.

From what I can tell, this is not possible using XBAR with PIT (input) and IOMUX (output). Are there other XBAR inputs or outputs that can accomplish this (QTIMER, FLEXIO)? Or are there separate modules entirely other than XBAR to accomplish this (FLEXIO)?

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Sabina_Bruce
NXP Employee
NXP Employee

Hello  Karl,

Hope you are doing well.

Based on your description I believe that if you have an output of a PWM  signal you will have better results than using a PIT interrupt. You can produce a signal that changes from high to low adequately. 

There is an example using the xbar and output pwm signal in our SDK for the RT1064. Please let me know if this fits what you are looking for. If so, I can provide more information as well as other posts that go deeper in detail. 

Best Regards,

Sabina

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karl_fraasch
Contributor III

Hi Sabina,

Is there any reason the method you mentioned is preferred vs doing the following

Using the PIT to trigger the DMA via crossbar. DMA configured to write to the GPIO DR_SET and/or DR_CLEAR registers.

PIT->XBAR->DMA->GPIO DR_SET, DR_CLEAR pins?

I have been playing around with this and have it somewhat working. My current issue is periodically triggering the DMA transfer to GPIO DR_CLEAR register without any processor intervention. Currently I have to reconfigure the DMA after each transfer.

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Sabina_Bruce
NXP Employee
NXP Employee

Hello Karl,

Hope you are doing well.

I believe that is taking a longer route to potentially cause delays or errors in adequately triggering your external ADC. Essentially from your above description, you could use the PIT to trigger a GPIO high and low state, without going through xbar and dma. The reason I'd recommend the pwm is because you can configure the signal to produce the high and low levels on the signal directly and only needing one module, making it simple and efficient. However, there may be a reason why you are choosing to use the xbar and dma specifically. If so, could you please share the principal objective of this route you are experimenting.

Best Regards,

Sabina

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karl_fraasch
Contributor III

Looking in page 78 of RT1064 reference manual, sounds like the DMA has the ability to write data to GPIO port.

"

• Using the GPIO ports to drive or sample waveforms
By configuring the DMA to transfer data to one or more GPIO ports, it is possible to
create complex waveforms using tabular data stored in on-chip memory. Conversely,
using the DMA to periodically transfer data from one or more GPIO ports, it is
possible to sample complex waveforms and store the results in tabular form in onchip
memory.

"

I will look into this, but also hoping to get some insight from NXP.

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