Read JedecID, erase & program external independent flash using flexSPI

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Read JedecID, erase & program external independent flash using flexSPI

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adi2Intel
Contributor II

Hi all

I'm opening new discussion since the previous was old. this time I will do my best for quick respond

Re: erasing & writing external flash - NXP Community

in brief :

on MIMXRT1050-EVKB board we removed hyperflash on U19 and solder new flash, QSPI type.

if was welded to the following pins :

adi2Intel_0-1655196983897.png

adi2Intel_2-1655197032485.png

for start, we want to read the JedecID . we prefer using single SPI but for start any method will do.

on the SDK example: flexSPI_nor_polling, we modified the following  :

pin configuration:

adi2Intel_5-1655198047695.png

 

in addition, we set the code to run from RAM.

 

regarding to Kerry's Q:

1. your test board is the customer board, or the MIMXRT1050-EVKB board, just like your previous picture, which solders the related external flash pins to the related pin area?

We are using MIMXRT1050-EVKB board with modified soldering. just like the picture.

these are the instructions we sent to welder : 

adi2Intel_4-1655197649909.png

 

2. About the testing code, you are testing modified flexSPI_nor_polling example, and it should run from the internal RAM, right?

YES

When you modify the code to the B port, which detail area you have modified?

only the auto generated areas after updating the pin configuration like photo above, and  on iomux.h :

adi2Intel_6-1655198245389.png

 

3. Please tell me do you leave this pin:

FLEXSPI_B_DQS, GPIO_SD_B0_05 as float?

YES, we didn't use these pins

 

Especially, tell me how do you connect the external flash to B port, if it is the NXP MIMXRT1050-EVKB board, which detail point you are soldering? When you want to boot from A port flash, you are using hyperflash or the QSPI flash?

We are planing to boot from QSPI flash with Port A, in the later stage of POC

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kerryzhou
NXP TechSupport
NXP TechSupport

Hi @adi2Intel ,

   Thanks for your new post!

  1. please help to provide your used QSPI flash datasheet which you solder on the board.

  2. Why do you connect to the TP27? 

  This is the CLKO1, but from your board connection, you connect it to your flash pins.

kerryzhou_0-1655268460864.png

 

3. share with me your modified flexSPI_nor_polling example project.

I need to check it on my side.

Just pin configuration is not enough, as you know, you are connect to the B port now, and you need set the A side to 0 at first to the B port.

 

4. as the FLEXSPI_B_DQS GPIO_SD_B0_05 connect to the external component, I think you need to use the 60Mhz for the flexSPI for the testing as first, and set the DQS loop internally.

5. code configuration should also need to modify

1 )#define FLASH_PORT kFLEXSPI_PortA1

to 

#define FLASH_PORT kFLEXSPI_PortB1

 

2)

#define EXAMPLE_FLEXSPI_RX_SAMPLE_CLOCK kFLEXSPI_ReadSampleClkLoopbackFromDqsPad

to 

#define EXAMPLE_FLEXSPI_RX_SAMPLE_CLOCK kFLEXSPI_ReadSampleClkLoopbackInternally

3) .flexspiRootClk = 120000000,

to

.flexspiRootClk = 60000000,

4) LUT need to check the command, which matches your qspi flash datasheet.

 

Anyway, share me your modified project and the flash datasheet.

Best Regards,

Kerry

 

 

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kerryzhou
NXP TechSupport
NXP TechSupport

Hi @adi2Intel ,

   Thanks for your new post!

  1. please help to provide your used QSPI flash datasheet which you solder on the board.

  2. Why do you connect to the TP27? 

  This is the CLKO1, but from your board connection, you connect it to your flash pins.

kerryzhou_0-1655268460864.png

 

3. share with me your modified flexSPI_nor_polling example project.

I need to check it on my side.

Just pin configuration is not enough, as you know, you are connect to the B port now, and you need set the A side to 0 at first to the B port.

 

4. as the FLEXSPI_B_DQS GPIO_SD_B0_05 connect to the external component, I think you need to use the 60Mhz for the flexSPI for the testing as first, and set the DQS loop internally.

5. code configuration should also need to modify

1 )#define FLASH_PORT kFLEXSPI_PortA1

to 

#define FLASH_PORT kFLEXSPI_PortB1

 

2)

#define EXAMPLE_FLEXSPI_RX_SAMPLE_CLOCK kFLEXSPI_ReadSampleClkLoopbackFromDqsPad

to 

#define EXAMPLE_FLEXSPI_RX_SAMPLE_CLOCK kFLEXSPI_ReadSampleClkLoopbackInternally

3) .flexspiRootClk = 120000000,

to

.flexspiRootClk = 60000000,

4) LUT need to check the command, which matches your qspi flash datasheet.

 

Anyway, share me your modified project and the flash datasheet.

Best Regards,

Kerry

 

 

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adi2Intel
Contributor II

adi2Intel_0-1655402398822.jpeg

 

GPIO_SD_B0_04 (TP27) is used as CS0 for flexspi port B

FLEXSPI_B_DQS, GPIO_SD_B0_05 is connected to J20, we dont use it. what is the reason you mention this signal? is it important to QSPI?

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kerryzhou
NXP TechSupport
NXP TechSupport

Hi @adi2Intel ,

   Thanks for your reply!

   I checked your hardware connection, it's OK! just one point, I think, the GND can use the U19 GND, eg, C1, as the J11_2 is a little far.

  Yes, DQS is very important, normally, we leave it as float, then loop from the DQS pin.

  More details, you can check the datasheet:

kerryzhou_0-1655444751362.png

So, if your DQS pin is used as other function, or connect with other component, it will influence the flexSPI clock, that's why I suggest you use 60Mhz, loop back internally test it at first, after it works, then we can use higher frequence, and loop from DQS pin.

Now, after hardware modification is OK, then need to check all the related software, need to use B port, pins, related configuration. Please test it, if you meet any issues, just kindly let me know, you even also can test the flexSPI CLK, data pin, whether it has wave or not.

Best Regards,

Kerry

 

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sapirbuz
Contributor II

Hi,

I'm the board designer who works with Adi on this project.

"as the FLEXSPI_B_DQS GPIO_SD_B0_05 connect to the external component, I think you need to use the 60Mhz for the flexSPI for the testing as first, and set the DQS loop internally"

Can you please explain more about the required 60Mhz and DQS loop internally?

  "Yes, DQS is very important, normally, we leave it as float, then loop from the DQS pin."

What if we will use the DQS pin for another purpose? (for example, GPIO at ALT5)

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kerryzhou
NXP TechSupport
NXP TechSupport

Hi @sapirbuz ,

   Thanks for your updated information.

Answer your questions:

1)Can you please explain more about the required 60Mhz and DQS loop internally?

=>Answer: Yes, of course! DQS pin is used for the flexSPI loop function, if it is float, then flexSPI can loop from this pin, then the flexSPI frequency can upto 133Mhz.

From above datasheet, you also can know it.

Another mode, it is that some customer need to use the DQS pin as other function, eg, GPIO, then, to the flexSPI module, can't use the loop from DQS pin directly, they can use loop from internal, then the flexSPI frequency is limit to 60Mhz.

Or, when the PCB layout is not very good, the DQS pin have some interference signal even it is float, then it also can use loop from internal.

That's why I let you test the 60Mhz, loop from internal side at first, just kick out the DQS pin impact, after it works, and your DQS pin also float, then we can add the frequency again in the software code.

2)What if we will use the DQS pin for another purpose? (for example, GPIO at ALT5)

=>Answer: Yes, other ALT, not the fexSPI DQS ALT.

So, just modify the software code, and test it again, let the QSPI flash works at first with B port.

Wish it helps you!

Best Regards,

Kerry

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adi2Intel
Contributor II

Hi Kerry and thanks for the answers

I have made all changes in the code you spoke of

regarding to the DQS, I have added it in the pin configuration and changed the flexspiRootClk to 60 MHz. I dont know what to do else.

regarding to : 

4) LUT need to check the command, which matches your qspi flash datasheet.

I think reading JedecId is the same on our device (postcode 0x9f)

 

trying to sample the pins on our flash using logic analyzer gave us the following :

adi2Intel_0-1655817361885.png

only clock signal pin pulsing something

still receiving 0 as response ...

 

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kerryzhou
NXP TechSupport
NXP TechSupport

Hi @adi2Intel ,

   Thanks for your effort!

   Don't worry, let me check more details, please give me this information, I will help you to check it:

1. Provide the project of modified \nor\polling_transfer

    I need to check your modified points in the project for the B port, thanks.

2. Could you share more logical analyzer pictures? whether the clock , data is correct?

kerryzhou_0-1655850123895.png

Then test, whether the clock is correct or not?

Best Regards,

Kerry

 

 

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adi2Intel
Contributor II

Hi Kerry

let me share you with something strange:

I tried sampling the pins(the DATA_0 pin) directly on the board with the logic analyzer :

adi2Intel_0-1656225250578.png

I ran the code in a loop.
the logic samplings was not correct, as the photo I have attached before (clock signal looks like a pulse).

during the efforts, I accidently disconnected the wire from the pin. 
later, when I looked in the opened terminal I saw this:

adi2Intel_1-1656225424822.png

I don't know how to explain this, maybe the connections was not strong enough and while playing with the probe of the logic analyzer it was fixed.

anyway we will solder the wire again

I have attached the modified example

Many thanks,

Adi from Intel

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kerryzhou
NXP TechSupport
NXP TechSupport

Hi @adi2Intel ,

   Thanks for your effort.

  Some modification on your project.

1. flexspi_nor_polling_transfer.c LUT erase command

const uint32_t customLUT[CUSTOM_LUT_LENGTH] = {

...

/* Erase Sector */
[4 * NOR_CMD_LUT_SEQ_IDX_ERASESECTOR] =//0XD7->0X20
FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x20, kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_1PAD, 0x18),

...

}

 

2. app.h

static inline void flexspi_clock_init(void)
{
const clock_usb_pll_config_t g_ccmConfigUsbPll = {.loopDivider = 0U};

CLOCK_InitUsb1Pll(&g_ccmConfigUsbPll);
CLOCK_InitUsb1Pfd(kCLOCK_Pfd0, 24); /* Set PLL3 PFD0 clock 360MHZ. */
CLOCK_SetMux(kCLOCK_FlexspiMux, 0x3); /* Choose PLL3 PFD0 clock as flexspi source clock. */
CLOCK_SetDiv(kCLOCK_FlexspiDiv, 5); /* flexspi clock 120M. *///2->5, 60Mhz
}

 

After the modification, please try it again.

Do you check the clock, whether it is 60Mhz or not?

From your test result, seems you already can get the data 0XEF, just don't know whether it is correct. And it is not very stable to get the data.

So, check the clock frequency, whether it is correct, you even can still slow down the flexSPI frequency, as it is the wire connect, maybe have a lot of interference when the flrequency is high.

Any test result, just kindly let me know.

Best Regards,

Kerry

 

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adi2Intel
Contributor II

Hi Kerry
sorry for the delay

after fixing the soldering, the example finally works!!! now we can read JedecID and program the chip

it works before the last code changes you provided, and works with the changes with no different.

what is the meaning of this change:
/* Erase Sector */
[4 * NOR_CMD_LUT_SEQ_IDX_ERASESECTOR] =//0XD7->0X20
FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x20, kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_1PAD, 0x18),

??

next step is:

1. to change the protocol to single SPI: how do we do it?

2. our SPI transactions needs to be on maximum 25 Mhrz. how do we change to 25? and to lower frequencies like 3 Mhrz?

thanks for everything

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kerryzhou
NXP TechSupport
NXP TechSupport

Hi @adi2Intel ,

   I am so glad you make progress now.

   So, the main issues is still in the solder side, the hardware side, right?

Now, answer your questions why I modify the code:

1. erase command with 0X20

  Please check your used windbond QSPI flash datasheet, you will find, your chip erase command is 0X20, not 0XD7

kerryzhou_0-1656898741403.png

So, if in your code, you use the 0XD7 call the erase sector, it can't work, that's why I help you modify it to match your datasheet.

Answer your questions:

As this post is really 1 month now, it's better to create the new question post for the new question, thanks, as our working flow has the case close time limit, thanks.

 

1. to change the protocol to single SPI: how do we do it?

=> Answer: Change the LUT from quad to single SPI(kFLEXSPI_1PAD), check the QSPI flash datasheet, you will find the single SPI command.

2. our SPI transactions needs to be on maximum 25 Mhrz. how do we change to 25? and to lower frequencies like 3 Mhrz?

=>Answer: even the SPI transaction, you still use the FlexSPI module, right?

If yes, still configure the FlexSPI module clock directly.

 

Wish it helps you!

If you still have questions about it, please help to create the new question post, thanks.

To this question, we can close it after you create the new question post.

Best Regards,

Kerry

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adi2Intel
Contributor II
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