RT1176 Custom Board Bring Up

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RT1176 Custom Board Bring Up

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Wobaffet
Senior Contributor I

Hello, 

We have a custom board design with RT1170 MCU, our QSPI flash is from Renesas AT25SF321B  I wanted to ask;

1- How can I program QE (Quad Enable) bit for the first time. I have an MCU-Link. How should I start?

2- I've attached both Winbond Flash which EVK has and the flash that we used on our custom board Renesas, on the Winbond it states there are 2 dummy bytes but according to both diagrams, the configuration for the dummy clocks are the same. Am I missing something? What do you think? 

Wobaffet_0-1686260281716.png

Wobaffet_1-1686260315104.png

3-  According to the DS from Renesas, which of the imported configs do I need to use? Because there are some conflicting parts for the example configs of the EVK flash. For example, .sflashA1Size is 16MB for the EVK, but the flash used on EVK is 64MB. And two config files have different commands, which one to use?

Thank you in advance!

Best Regards,

 

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4 Replies

1,084 Views
Wobaffet
Senior Contributor I

reminder

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1,058 Views
jingpan
NXP TechSupport
NXP TechSupport

Hi @Wobaffet ,

1- How can I program QE (Quad Enable) bit for the first time. I have an MCU-Link. How should I start?

The easiest way to program the QE bit is by the tool. You can use MCUXpresso Secure Provisioning Tool to connect RT1176 in serial download mode.

jingpan_0-1686551765957.png

Click Edit->Test. Bootloader will write QE bit for you.

The other way is using Flexspi_nor_polling_transfer_cm7 demo in SDK to verify your flash settings. This project will program QE bit.

2 both diagrams, the configuration for the dummy clocks are the same. Am I missing something? What do you think? 

Yes, 4 dummy clock equal to 2 dummy byte. In quad mode, 1 byte need 2 clock.

which one to use?

The EVK use is25wp128. It is a 16M flash. If you will use a different one, of course your should modify this size.

 

Regards,

Jing

1,021 Views
Wobaffet
Senior Contributor I

Hello,

Thank you for your answer. Can you verify this configuration according to Renesas AT25SF321B?

const flexspi_nor_config_t qspiflash_config = {
    .memConfig =
        {
            .tag              = FLEXSPI_CFG_BLK_TAG,
            .version          = FLEXSPI_CFG_BLK_VERSION,
            .readSampleClksrc=kFlexSPIReadSampleClk_LoopbackFromDqsPad,
            .csHoldTime       = 5u,
            .csSetupTime      = 5u,
            // Enable DDR mode, Wordaddassable, Safe configuration, Differential clock
            .controllerMiscOption = 0x10,
            .deviceType           = kFlexSpiDeviceType_SerialNOR,
            .sflashPadType        = kSerialFlash_4Pads,
            .serialClkFreq        = kFlexSpiSerialClk_100MHz,
            .sflashA1Size         = 4u * 1024u * 1024u,
            .lookupTable =
                {
                        // Read LUTs
                        [0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18),
                        [1] = FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x06, READ_SDR, FLEXSPI_4PAD, 0x04),

 

                        // Read Status LUTs
                        [4 * 1 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x05, READ_SDR, FLEXSPI_1PAD, 0x04),

 

                        // Write Enable LUTs
                        [4 * 3 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x06, STOP, FLEXSPI_1PAD, 0x0),

 

                        // Erase Sector LUTs
                        [4 * 5 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x20, RADDR_SDR, FLEXSPI_1PAD, 0x18),

 

                        // Erase Block LUTs
                        [4 * 8 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xD8, RADDR_SDR, FLEXSPI_1PAD, 0x18),

 

                        // Pape Program LUTs
                        [4 * 9 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x02, RADDR_SDR, FLEXSPI_1PAD, 0x18),
                        [4 * 9 + 1] = FLEXSPI_LUT_SEQ(WRITE_SDR, FLEXSPI_1PAD, 0x04, STOP, FLEXSPI_1PAD, 0x0),

 

                        // Erase Chip LUTs
                        [4 * 11 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x60, STOP, FLEXSPI_1PAD, 0x0),
                },
        },
    .pageSize           = 256u,
    .sectorSize         = 4u * 1024u,
    .ipcmdSerialClkFreq = 0x1,
    .blockSize          = 64u * 1024u,
    .isUniformBlockSize = false,
};

 

Thank you in advance!

Best Regards.

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1,015 Views
jingpan
NXP TechSupport
NXP TechSupport

Hi @Wobaffet ,

It seems fine.

 

Regards,

Jing