RT1170 TDM capability questions

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RT1170 TDM capability questions

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yfliu
Contributor IV

Hi,

I am still learning RT117x crossover MCU, especially its ability to manage TDM links.

Here are my questions list, looking forward to anwsers and suggestions:

  • Can we have two-way TDM links with two other devices using only SAI1 device? 
    • Can we use TX1/RX1 for one TDM link with one peer and use TX2/RX2 for TDM link with another peer?
    • If each peer takes two lines in above design, SAI1 device can support 4 such peers? 
  • For each unidirectional TDM link, the max frame length is 32 for RT1170?

 

Regards,

yf

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kerryzhou
NXP TechSupport
NXP TechSupport

Hi @yfliu ,

   Yes, of course, RT1170 SAI can support the TDM.

  You even can find examples from the RT1050, which is the same SAI module:

SDK_2_11_1_EVKB-IMXRT1050\boards\evkbimxrt1050\driver_examples\sai\edma_tdm

Answer your questions:

  • Can we have two-way TDM links with two other devices using only SAI1 device? 

=>Answer:  yes, SAI1 have several TX channel, max 4, each channel can be used as TDM. 

  • Can we use TX1/RX1 for one TDM link with one peer and use TX2/RX2 for TDM link with another peer?

=>Answer: No, Tx and RX is not the same pin, so, you can't use it together. TX for transfer, RX for receive.

  • If each peer takes two lines in above design, SAI1 device can support 4 such peers? 

=>Answer: SAI can support 4TX or 4 RX, just 1 TX and 1 RX is independent, other 3 share the pin, when you use as TX, you can't use as RX.

More details, check the RM.

  • For each unidirectional TDM link, the max frame length is 32 for RT1170?

=>Answer: yes, you are right

 

Best Regards,

kerry

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kerryzhou
NXP TechSupport
NXP TechSupport

Hi @yfliu ,

   Yes, of course, RT1170 SAI can support the TDM.

  You even can find examples from the RT1050, which is the same SAI module:

SDK_2_11_1_EVKB-IMXRT1050\boards\evkbimxrt1050\driver_examples\sai\edma_tdm

Answer your questions:

  • Can we have two-way TDM links with two other devices using only SAI1 device? 

=>Answer:  yes, SAI1 have several TX channel, max 4, each channel can be used as TDM. 

  • Can we use TX1/RX1 for one TDM link with one peer and use TX2/RX2 for TDM link with another peer?

=>Answer: No, Tx and RX is not the same pin, so, you can't use it together. TX for transfer, RX for receive.

  • If each peer takes two lines in above design, SAI1 device can support 4 such peers? 

=>Answer: SAI can support 4TX or 4 RX, just 1 TX and 1 RX is independent, other 3 share the pin, when you use as TX, you can't use as RX.

More details, check the RM.

  • For each unidirectional TDM link, the max frame length is 32 for RT1170?

=>Answer: yes, you are right

 

Best Regards,

kerry

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yfliu
Contributor IV

Kerry,

 

Thank you for the prompt reply.

My purpose is to have bi-directional TDM links with two other peer devices from our crossover MCU.

So as you explained, can I use SAI1.TX1 and SAI1.RX1 for bi-directional TDM link with one peer, and use SAI1.TX2 and SAI1.RX3 for bi-directional TDM link with another peer, right? 

This design follows your explanation that: TX1 and RX1 and separate pins, while TX2 and RX2 are the same pin, so are TX3 and RX3. 

as for the Rt1050 sample, I will see if I can create my SDK download for both RT1170 and RT1050 boards so that my sample base is more complete.

Regards,

Yanfeng

 

 

 

 

 

 

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kerryzhou
NXP TechSupport
NXP TechSupport

Hi @yfliu ,

  Your understand is correct.

   Except the TX0, RX0 is fixed, the other TX, RX higher number is shared, eg:

kerryzhou_1-1651109165236.png

 

So, you can use the code to control it is the tx or the rx, when you use the TX_DATA1 to DATA3.

Please note, TX_DATA1 share with RX_DATA3.

The direction is controlled by the code.

You can refer to the RT1050 TDM sample code, and add the related code to the RT1170, just for your reference.

Best Regards,

Kerry

BTW, next time, please use the company email to create the case, that will have higher prioirty.

 

 

 

 

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yfliu
Contributor IV

Kerry,

 

Thank you for the confirmations. So I can use "SAI1.TX0 + SAI1.RX0" with peer and use "SAI1.TX1 + SAI1.RX1" for another peer.

My other questions are related to TDM clocks:

  • Can I use shared external bit clock input at all my TDM ports? The main reason is to simplify bit clock design.
  • Can the SAI transmit port generate Frame Sync signals in on-demand manner or it must be geneated continueously? In other words, can we have gaps between end of last frame and begining of next frame?

For "company email", did you mean that I should add company email address to my profile?

Regards,

Yanfeng

 

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kerryzhou
NXP TechSupport
NXP TechSupport

Hi @yfliu 

SAI1.TX1 + SAI1.RX3, TX2+RX2, TX3+RX1, please note, these pare are share one pin, when you do transfer, you can't receive. More details, check the RM and my above reply's picture.

Can I use shared external bit clock input at all my TDM ports? The main reason is to simplify bit clock design.

=>Answer: yes!

Can the SAI transmit port generate Frame Sync signals in on-demand manner or it must be geneated continueously? In other words, can we have gaps between end of last frame and begining of next frame?

=>Answer: yes, SAI can generate the SYNC when you configure it as master mode.

For "company email", did you mean that I should add company email address to my profile?

=>use company email create the account, and create the new question post.

 

Best Regards,

Kerry

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