RT1052 SNVS Low Power

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RT1052 SNVS Low Power

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variable_andrew
Senior Contributor I

From my understanding of the RT1052 low power app notes and demo apps - in order to go into "SNVS low power mode" - all I really need to do is run the following code:

 

  	SNVS->LPCR |= SNVS_LPCR_TOP_MASK;
  	while (1) /* Shutdown */
  	{ }

However, if I create an application that just runs ^^^ from main, instead of seeing the expected <1mA current consumption, I see 15mA. (We removed SDRAM, removed FLASH, removed the other peripherals the RT1052 connects to, still see the same current)

If I set up the WAKE pin and then use that to exit wait mode, it successfully exits SNVS low power and wakes back up.


Is there anything else that needs to be done before entering SNVS?

 

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Alexis_A
NXP TechSupport
NXP TechSupport

Hello @variable_andrew,

As you could figure out to obtain the measurements record in the application note is need to disable the power on the other power rails and according to the reference manual:

Enter SNVS mode by SW or ON/OFF button, then on-chip DCDC will be off, and PMIC_ON_REQ pin will also go to low to notify outside.

And this is the pin that enables and disables the regulators in the EVK.

Best Regards,

Alexis Andalon

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Alexis_A
NXP TechSupport
NXP TechSupport

Hello @variable_andrew,

As you mention, calling this line should be enough to enter SNVS mode.

In the following application note, you can find the power consumption measured in the EVK and in the SDK there's an example code called power_mode_switch_bm that implements calls to the different power modes. Did you use this example to test this?

Best Regards,
Alexis Andalon

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variable_andrew
Senior Contributor I

Hello @Alexis_A ,

 

Thanks for the follow up - and yes, I have tested with the SDK demo.
I have altered the demo to remove any use of FLASH, SDRAM (since now I've removed both of those off my board... in addition to UART), and used this to confirm the results I'm getting. With the demo I am also getting ~15mA.

Here is the altered demo code: https://github.com/andrewrt/evkbimxrt1050_power_mode_switch_bm_ram

 

According to the appnote, I expect to get < 1mA as I understand it...

 

 

 

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Alexis_A
NXP TechSupport
NXP TechSupport

Hello @variable_andrew ,

Are you testing this in our EVK or is it a custom board?

Best Regards,

Alexis Andalon

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variable_andrew
Senior Contributor I

Hi @Alexis_A ,

It's on our custom board.

In order to trouble shoot, I've lifted all peripherals (including SDRAM & FLASH), so at this point it's just

  • power regulators,
  • pullups (2k) for i2c,
  • boot_cfg pullDOWNs, 
  • xtal1/2. 

I've sent in a heavily cropped schematic to our NXP FAE to take a look at this...

One note is that we're powering VDD_SNVS off a separate 3.3V regulator as the other 3.3V's. Assuming these come up at the same time. Could this potentially cause a 10~14mA current draw? 

I could remove the SNVS VDD regulator and short to the main 3.3V to test...

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variable_andrew
Senior Contributor I

and one more quick pair of questions @Alexis_A :

I noticed that the PMIC_.... pins get set to logic "1" in SNVS? are there any other pins we need to be wary of?

 

Also I noticed that in the AN12094 power results - the voltage for non-SNVS rails are listed as 0 instead of 3.3V for "Shutdown the system".

Does the EVK somehow shut down the voltage non-SNVS regulators in SNVS "shutdown mode"?

 

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variable_andrew
Senior Contributor I

I realized the EVK uses PMIC_ON_REQ is directly connected to the 3.3V power regulator EN pin, and this appears to be what cuts non-SNVS_3.3V when the device goes into SNVS sleep mode.

If I "simulate" this behavior by the following:

  1. Run code to put device into SNVS mode
  2. (Current pulled: ~15mA)
  3. Cut non-SNVS 3.3V
  4. (Current pulled: < 1mA)
  5. Reconnect non-SNVS 3.3V
  6. (Current pulled: ~15mA)
  7. Press WAKE
  8. (Device boots / starts up)

Can you confirm that directly connecting PMIC_ON_REQ to the non - SNVS 3.3V regulator is the recommended flow for ensuring SNVS mode is truly used as advertised?

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Alexis_A
NXP TechSupport
NXP TechSupport

Hello @variable_andrew,

As you could figure out to obtain the measurements record in the application note is need to disable the power on the other power rails and according to the reference manual:

Enter SNVS mode by SW or ON/OFF button, then on-chip DCDC will be off, and PMIC_ON_REQ pin will also go to low to notify outside.

And this is the pin that enables and disables the regulators in the EVK.

Best Regards,

Alexis Andalon

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variable_andrew
Senior Contributor I
Spoiler
 

Thanks for the confirmation @Alexis_A ,

And so the PMIC_ON_REQ pin will be driven high again when hitting the WAKE button, and also at POR / initial chip power on, right?

 

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Alexis_A
NXP TechSupport
NXP TechSupport

Hello @variable_andrew,

That's right unless the MCU is in SNVS mode, the pin will remain high.

Best Regards,

Alexis Andalon