RT1052 SEMC - SDRAM Sleep / Low Power

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RT1052 SEMC - SDRAM Sleep / Low Power

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variable_andrew
Senior Contributor I

How do you put the RT1052's SEMC for SDRAM into low power mode (assuming the same ISSI SDRAM that's used in the EVK, etc)?


I saw some mention of a deep sleep mode for other NXP parts' SEMC.

How do we do the same here?

Might be irrelevant, but we initialize the SDRAM w/ this code:

status_t BOARD_InitSEMC(void)
{
  semc_config_t config;
  semc_sdram_config_t sdramconfig;
  uint32_t clockFrq = CLOCK_GetFreq(kCLOCK_SemcClk);

  /* Initializes the MAC configure structure to zero. */
  memset(&config, 0, sizeof(semc_config_t));
  memset(&sdramconfig, 0, sizeof(semc_sdram_config_t));

  /* Initialize SEMC. */
  SEMC_GetDefaultConfig(&config);
  config.dqsMode = kSEMC_Loopbackdqspad; /* For more accurate timing. */
  SEMC_Init(SEMC, &config);

  /* Configure SDRAM. */
  sdramconfig.csxPinMux           = kSEMC_MUXCSX0;
  sdramconfig.address             = 0x80000000;
  sdramconfig.memsize_kbytes      = 32 * 1024; /* 32MB = 32*1024*1KBytes*/
  sdramconfig.portSize            = kSEMC_PortSize16Bit;
  sdramconfig.burstLen            = kSEMC_Sdram_BurstLen8;
  sdramconfig.columnAddrBitNum    = kSEMC_SdramColunm_9bit;
  sdramconfig.casLatency          = kSEMC_LatencyThree;
  sdramconfig.tPrecharge2Act_Ns   = 18; /* Trp 18ns */
  sdramconfig.tAct2ReadWrite_Ns   = 18; /* Trcd 18ns */
  sdramconfig.tRefreshRecovery_Ns = 67; /* Use the maximum of the (Trfc , Txsr). */
  sdramconfig.tWriteRecovery_Ns   = 12; /* 12ns */
  sdramconfig.tCkeOff_Ns =
      42; /* The minimum cycle of SDRAM CLK off state. CKE is off in self refresh at a minimum period tRAS.*/
  sdramconfig.tAct2Prechage_Ns       = 42; /* Tras 42ns */
  sdramconfig.tSelfRefRecovery_Ns    = 67;
  sdramconfig.tRefresh2Refresh_Ns    = 60;
  sdramconfig.tAct2Act_Ns            = 60;
  sdramconfig.tPrescalePeriod_Ns     = 160 * (1000000000 / clockFrq);
  sdramconfig.refreshPeriod_nsPerRow = 64 * 1000000 / 8192; /* 64ms/8192 */
  sdramconfig.refreshUrgThreshold    = sdramconfig.refreshPeriod_nsPerRow;
  sdramconfig.refreshBurstLen        = 1;
  return SEMC_ConfigureSDRAM(SEMC, kSEMC_SDRAM_CS0, &sdramconfig, clockFrq);
}
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Hui_Ma
NXP TechSupport
NXP TechSupport

Hi Andrew,

 

The AN12085 has mentioned below info about SDRAM during RT1052 in low power mode:

Hui_Ma_0-1608705364231.png

And RT1050 reference manual with below info:

Hui_Ma_1-1608705503438.png

The SEMC module will let external SDRAM enter into self refresh mode automatically before chip enter into low power mode.

If you still have concerns, you can use IP command to send SDRAM AUTO REFRESH command with SEMC IP Command register (IPCMD).

Wish it helps.

Mike 

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Hui_Ma
NXP TechSupport
NXP TechSupport

Hi,

MIMXRT1050-EVKB board using ISSI S42S16160J-6BLI SDRAM with below description to enter into power down mode:

pastedImage_1.png

pastedImage_2.png

Before customer let external SDRAM enter into power down mode, it need to send SDRAM auto refresh command to external SDRAM.

Wish it helps.


Have a great day,
Mike

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variable_andrew
Senior Contributor I

Hi @Hui_Ma ,

Sorry for the delayed response - just getting back to power optimization in my project again and looking at SDRAM:

It's not clear to me how to properly do this using the MCUXpresso RT1052 SDK as there is no direct function in the SDK (or in the RT1052 RM) about turning CKE to off via the SEMC.

Do I need to disable the SEMC-SDRAM first via:

 

  SEMC_Deinit(SEMC);

 


And then change the SEMC's CKE pin (GPIO_EMC_27) to 0 using GPIO, eg:

 

#define SDRAM_GPIO GPIO4
#define SDRAM_GPIO_CKE_PIN (27U)
  gpio_pin_config_t pin_config = {kGPIO_DigitalOutput, 0, kGPIO_NoIntmode};
  GPIO_PinInit(SDRAM_GPIO, SDRAM_GPIO_CKE_PIN, &pin_config);
  GPIO_PinWrite(SDRAM_GPIO, SDRAM_GPIO_CKE_PIN, 0U);

 

 

Or should I be manually forcing CKE down FIRST, and THEN deInit SEMC? or...??

 

Has someone at NXP/FSL written an example that proves out powering down SDRAM from the i.MX RT parts?

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Hui_Ma
NXP TechSupport
NXP TechSupport

Hi Andrew,

 

The AN12085 has mentioned below info about SDRAM during RT1052 in low power mode:

Hui_Ma_0-1608705364231.png

And RT1050 reference manual with below info:

Hui_Ma_1-1608705503438.png

The SEMC module will let external SDRAM enter into self refresh mode automatically before chip enter into low power mode.

If you still have concerns, you can use IP command to send SDRAM AUTO REFRESH command with SEMC IP Command register (IPCMD).

Wish it helps.

Mike