RT1021 LPSPI DMA in Quad mode

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RT1021 LPSPI DMA in Quad mode

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nda
Contributor III

Hello. Does anybody knows how to use DMA in LPSPI in Quad mode. I can understand how i can do that. Is it possible to use quad mode with DMA? I ask this because i need to set LPSPI_TCR[TXMSK] for reception, but when i do that module starts transmitting and resets LPSPI_TCR[TXMSK] automaticaly before starting DMA.

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nda
Contributor III

Now i can answer the question. It is possible to use LPSPI in Quad mode with DMA. It is necessary to rewrite LPSPI_MasterTransferEDMA to configure DMA to write to TCR instead of TDR. Dont forget to change transfer size to 4 Bytes, because the Command Register should only be written using 32-bit writes. CFGR1 also should be changed accordingly.

Nevertheless quad mode doesnot helped me to increase transfer baubrate. Maximum throughput stays on the limit of 30megabit per second. If am using Quad mode and 30MHz Spi clock there are sugnificant delays in transmissions :(. So Quad mode helps to reduce clock of SPI and doesnot help to increase baudrate. 

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jeremyzhou
NXP TechSupport
NXP TechSupport

Hi,
Thank you for your interest in NXP Semiconductor products and for the opportunity to serve you.
1)Is it possible to use quad mode with DMA?
-- Yes, and in my opinion, essentially, it's no difference between single-data SPI and quad-data SPI transfer via the DMA way.
Have a great day,
TIC

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nda
Contributor III

Hello,  jeremyzhou.

There is big difference in single-data SPI and quad-data SPI receive. In case of single-data SPI receive i need to write to TDR register to start transmission, while in quad-data SPI receive i need to set TCR[TXMSK](any write to TDR will start transmission, not receiving ). So my question - how to !receive! data using DMA  in quad-data mode.

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jeremyzhou
NXP TechSupport
NXP TechSupport

Thanks for your reply.
After confirming, 4-bit half-duplex transfers are useful for interfacing to QuadSPI memory devices, and at least one bit (Transmit Data
Mask (TCR[TXMSK] or Receive Data Mask TCR[RXMSK]) must
also be set.
However, when set TCR[RXMSK]), receive data is not stored in receive FIFO, and according to Table 47-10. LPSPI Interrupts and DMA Requests, the mechanism is unable to trigger the DMA request.

jeremyzhou_0-1616989781623.png

 


Sorry for the previous reply bring inconvenience to you.
Have a great day,
TIC

-------------------------------------------------------------------------------
Note:
- If this post answers your question, please click the "Mark Correct" button. Thank you!

 

- We are following threads for 7 weeks after the last post, later replies are ignored
Please open a new thread and refer to the closed one, if you have a related question at a later point in time.
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nda
Contributor III

Now i can answer the question. It is possible to use LPSPI in Quad mode with DMA. It is necessary to rewrite LPSPI_MasterTransferEDMA to configure DMA to write to TCR instead of TDR. Dont forget to change transfer size to 4 Bytes, because the Command Register should only be written using 32-bit writes. CFGR1 also should be changed accordingly.

Nevertheless quad mode doesnot helped me to increase transfer baubrate. Maximum throughput stays on the limit of 30megabit per second. If am using Quad mode and 30MHz Spi clock there are sugnificant delays in transmissions :(. So Quad mode helps to reduce clock of SPI and doesnot help to increase baudrate. 

View solution in original post

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