RT 1050 DCDC_IN rail

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RT 1050 DCDC_IN rail

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martinsmith
Contributor III

Hi, I'm working on a custom PCB and am having trouble powering the RT1052 processor.

I bring up the VDD_SNVS and then the 3V and 1V8 rails using LDOs. There is a 1ms delay (RC circuit) between the 3V rail and the DCDC_PSWITCH pin.

The problem I'm getting is that the 3V rail doesn't come up beyond 1V. I can scope the POR pin via a TP and that does go high to show the 3V rail is up but then goes low again and repeats every 250ms or so.

Any ideas what could be the problem?

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Yuri
NXP Employee
NXP Employee

 

Hello,

 

   Is it possible to look at the schematic?

Generally the Hardware Development Guide for the MIMXRT1050 may be used

to check the design.


https://www.nxp.com/docs/en/user-guide/MIMXRT1050HDUG.pdf 

 

Have a great day,

Yuri

 

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martinsmith
Contributor III

Thanks for the reply, I have looked through the document and think my problem comes from the rev 0 silicon (part number MIMXRT1052DVL6A instead of MIMXRT1052DVL6B)

I have connected the DCDC_IN pins to the VDDA_ADC_3V3 and NVCC_GPIO_X pins and can't change it without a re-spin. would this be a problem? or could it be something else?

There are a few things I want to check

  1. I'm not using USB so haven't connected USB_OTGx_VBUS to any power. I have put a cap on VDD_USB_CAP though
  2. I'm not using the RTC, so have not connected a xtal to RTC_XTALx
  3. PMIC_STBY_REQ is not connected to anything
  4. POR_B is driven low by an IC until the power rail has been stable for 250ms
  5. DCDC_PSWITCH has a 1ms delay via an RC circuit before it is brought to DCDC_IN
  6. CCM_CLK1_x are not connected to anything

Does all of that sound correct?

Thanks, Martin 

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Yuri
NXP Employee
NXP Employee

Hello,

  

   below are some comments regarding the issue.

   For silicon A0 silicon - "if you don’t power SNVS together with DCDC_IN by 2.8 V ~ 3.0 V,

the on-chip DCDC module does not work properly". Note, voltage must not exceed 3.0V.

  If internal oscillator is intended for using, it is recommended to tie RTC_XTALI to GND and

leave RTC_XTALO floating.  

Regards,

Yuri.

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