QSPI Initial loading on secondary pinmux

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QSPI Initial loading on secondary pinmux

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Contributor IV

Oh dear, this one is causing me some trouble!

I still cannot get my MIMXRT1021 QSPI to boot using the secondary pinmux configuration, but I think I understand why....I just don't know how to fix it.

I have BOOT_CFG[3:1]=111b and it is indeed going to the secondary chip at around 30MHz clock, selecting it, writing a read request and waiting for data to come back....trouble is, the data never comes back. The reason for that is that /HOLD (IO3) is low - so as far as the flash is concerned it isn't supposed to respond.  When I look on the 1021EVK (which uses the primary pinmux) /HOLD is high, and the flash reads out correctly. In all other respects the signals appear identical.

I have placed external (5K6) pullups on D0..D3 and now I can at least get the processor to read something from the flash, and it responds to erase requests correctly. I didn't see anything about needing external pullups in either the Technical Datasheet or the User Manual, and I can't yet write to the flash properly.

Is there any additional data about using the secondary/alternate pinmux or a bit of guidance?  Can't help feeling I'm flying a bit blind here...

Regards

DAVE

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Contributor IV

Kerry,

Provided I keep /HOLD high then I am able to boot using this flash in two bit mode (/WE isn't important, provided you don't enable it in the config registers).  However, I simply _could not_ get it to work in four bit mode.  I resorted to taking the (working) code out of an EVK board and putting that into my flash, with the same result...

In the end the problem was a simple electrical one....a very poor ground loop back to the CPU; driving two pins was marginal, but four pins pushed it over the edge, even at slow clocks. Who would have thought driving pins at 100MHz might need a bit of attention to PCB layout?? :-/

Regards

DAVE

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Contributor IV

Hi Kerry,

I've tried various flash chips, but for now I'm using the IS25LP064A which is the same as on the EVK to remove that as a variable. I am now a few steps beyond this post but certainly there appears to be a significant difference between the primary and alternate pinmux settings in that the primary appears to have the internal pullups on the CPU enabled whereas the secondary doesn't. In actual fact all I needed to get the thing going was a pullup on the /HOLD pin (the /WP is ignored unless you've activated it via SRWD first), which is convenient to do with an 0603 resistor between pins 7 & 8... I don't yet have code running from the flash but I can at least access it now...on the write side I was missing an entry in the FlashSPI table which meant the QE bit was never getting set. An app note on all of this (Boot Pin Config, FlashSPI table, secondary pinmux, pullups, use of Flashloader_RT1020, IVT etc.) would be really helpful on this as there are a lot of steps between chip-not-responding and code-running-from-flash :-)

Regards

DAVE

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NXP TechSupport
NXP TechSupport

Hi Dave,

   Thanks a lot for your updated information.

   So, now, after you add the pull up on the /HOLD pin, and enable the QE bit, can you make all the function works on your side?

   If you still have question about it, please kindly let me know.

  About the app, we have some FlexSPI for nor flash, but it is use the primary, no secondary app note now. ABout the boot pin config, and use of flashloader, you can refer to the doc in flashloader for RT1020:

Flashloader_RT1020_1.0_GA\Flashloader_RT1020_1.0_GA\doc

 

Have a great day,
Kerry

 

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Contributor IV

Kerry,

Provided I keep /HOLD high then I am able to boot using this flash in two bit mode (/WE isn't important, provided you don't enable it in the config registers).  However, I simply _could not_ get it to work in four bit mode.  I resorted to taking the (working) code out of an EVK board and putting that into my flash, with the same result...

In the end the problem was a simple electrical one....a very poor ground loop back to the CPU; driving two pins was marginal, but four pins pushed it over the edge, even at slow clocks. Who would have thought driving pins at 100MHz might need a bit of attention to PCB layout?? :-/

Regards

DAVE

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NXP TechSupport
NXP TechSupport

Hi Dave,

    What the external QSPI flash you are using now?

   About the pull up, some QSPI flash internal have the pull up, but it's better in HOLD and WP pin add external 4.7K pull up resistor to make sure the QSPI flash work.

   You said, you can't write the QSPI flash, do you enable the QE bit on your side?

    If you still have problems, please let me know the QSPI flash you are using now, and what the code you are using.

Have a great day,
Kerry

 

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