NXP MIMXRT685-EVK: i.MX RT600 SDK 2.8.2, control ST LSMDSOX by using i3c CCC command SETDASA?

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NXP MIMXRT685-EVK: i.MX RT600 SDK 2.8.2, control ST LSMDSOX by using i3c CCC command SETDASA?

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KennyHo
Contributor II

Dear NXP experts:

Related topic NXP AN12796 can't work either in debug mode or programming flash mode.

when in debug mode, 

Disassembly windows shows

deadbeee: Failed to execute MI command:
-data-disassemble -s 3735928558 -e 3735928591 -- 3
Error message from debugger back end:
Cannot access memory at address 0xdeadbeee

and it can't run further anymore.

 

How can I control i3C slave device ST LSMDSOX by using i3c CCC command SETDASA
by SDK2.8.2 API such as driver i3c example "evkmimxrt685_i3c_polling_b2b_transfer_master"?

Any new i3c application example available?

Board: NXP MIMXRT685-EVK: i.MX RT600

SDK 2.8.2,

MCUXpressoIDE_11.2.1_4149.exe

JLink_Windows_V686f.exe

 

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jeremyzhou
NXP TechSupport
NXP TechSupport

Hi,
Thanks for your reply and explanation.
I replicate the issue on my board and I'll report the 'bug' to the author for checking.
If you want to use the code now, in my experience, I'd like to suggest you port it to a template project instead of modifying the demo itself, as it's usually a more efficient way.


Have a great day,
TIC

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9 Replies
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jeremyzhou
NXP TechSupport
NXP TechSupport

Hi,
Thank you for your interest in NXP Semiconductor products and for the opportunity to serve you.
Whether you mean that the evkmimxrt685_i3c_polling_b2b_transfer_master demo will crash after entering the debug mode just as the attachment shows, in another word, you think there are some bugs in this demo, isn't right?
Have a great day,
TIC

 

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KennyHo
Contributor II

Dear NXP experts:

evkmimxrt685_i3c_polling_b2b_transfer_master demo can work. it shows 2 NXP MIMXRT685-EVK board  i3c master and slave communication, but it has no CCC comand SETDASA sample code.

 

We want use NXP MIMXRT685-EVK board to control i3c device ST LSM6DSOX with CCC comand SETDASA ,  AN12796 seems more suitable for our application.

but AN12796 attachment AN12796SW.zip/evkmimxrt685_i3c_demo can't work both in debug and programming flash.

 

thanks sincerely!

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jeremyzhou
NXP TechSupport
NXP TechSupport

Hi,
I've escalated the question and I was wondering if you can provide some brief information about your company and project.
Looking forward to your reply.
Have a great day,
TIC

 

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jeremyzhou
NXP TechSupport
NXP TechSupport

Hi,
Thanks for your reply and explanation.
I replicate the issue on my board and I'll report the 'bug' to the author for checking.
If you want to use the code now, in my experience, I'd like to suggest you port it to a template project instead of modifying the demo itself, as it's usually a more efficient way.


Have a great day,
TIC

-------------------------------------------------------------------------------
Note:
- If this post answers your question, please click the "Mark Correct" button. Thank you!

 

- We are following threads for 7 weeks after the last post, later replies are ignored
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KennyHo
Contributor II

Hi Jeremy:

Our company provide sensor fusion solution for mobile device navigation subsystem.

I am application software/firmware/algorithm engineer.

I build a new SDK v2.8.2 project and pull in source files of AN12796SW.zip/evkmimxrt685_i3c_demo,
its debug or programming flash works!

Board: NXP MIMXRT685-EVK: i.MX RT600
SDK: SDK_2.8.2_EVK-MIMXRT685.zip
MCUXpressoIDE_11.2.1_4149.exe
JLink_Windows_V686f.exe


thanks a lot!

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jeremyzhou
NXP TechSupport
NXP TechSupport

Hi,
I'd like to share the updated demo code of the AN12796 with you, please give it a try.
Have a great day,
TIC

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hichen_invn
Contributor II

Hi...

 

I found this thread which is very close to what I need for my project.

Just wondering could you have new example project with IBI and ENTDAA process?

Thank you so much..

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KennyHo
Contributor II

Hi Jeremy:

Thanks for your great support.

an12796_i3c_simple_master_mimxrt685_evk_rev_e2_20201207_A.zip works,

in my board only 1 i3c device LDSM6DSOX, static address 0x6A,

//#==================

//# UART console output:

//#==================

This is a simple RT685 EVK I3C demo, press SW1 to continue...

I3C timing in this demo is prepared expecting Main clock = 500 MHz.
Current setup Main clock = 500210526 Hz.

Bus communication set not to exceed Fast-mode (400 kHz)

Broadcast CCC DISEC (DISHJ + DISMR + DISINT): PASSED/OK
Broadcast CCC RSTDAA: PASSED/OK

Direct CCC SETDASA (hex static addr = 5C, dynamic addr = 21): FAILED: I3C slave NACKED address

Direct CCC SETDASA (hex static addr = 5D, dynamic addr = 22): FAILED: I3C slave NACKED address

Direct CCC SETDASA (hex static addr = 68, dynamic addr = 23): FAILED: I3C slave NACKED address

Direct CCC SETDASA (hex static addr = 69, dynamic addr = 24): FAILED: I3C slave NACKED address

Direct CCC SETDASA (hex static addr = 6A, dynamic addr = 25): PASSED/OK
hex PID + BCR + DCR:

it seems  SETDASA  passed, 

but hang in read hex PID+BCR+DCR,

Maybe my i3c device signal and ground issue.

 

thanks again.

 

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jeremyzhou
NXP TechSupport
NXP TechSupport

Hi,
Thanks for your reply and could you share me with your company's name or Website?
Have a great day,
TIC

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