NMI interrupt on i.MXRT

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NMI interrupt on i.MXRT

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antoinezen
Contributor III

Hi,

We are using ZephrOS V2.1 on IMXRT1062. In some condition (uncertain which for now), the MCU end-up in the NMI handler that is just a infinite loop in ZephyrOS, freezing our application.

I've understand that on ARM Cortex-M, use of the NMI interrupt is SoC/MCU dependent. Reading all possible NXP documentation, I understand that the NMI input can be routed to the WAKEUP pin. Are they other use of the NMI in the SoC IP ? Any future documentation ? What else could trigger the NMI interrupt ?

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jeremyzhou
NXP Employee
NXP Employee

Hi Antoine Zen-Ruffinen,

Thank you for your interest in NXP Semiconductor products and
for the opportunity to serve you.
According to the RM, the ETB counter control can cause an NMI to interrupt, besides the Wakeup pin.

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And please learn the information about the ETB via the below link.

https://static.docs.arm.com/ihi0029/e/coresight_v3_0_architecture_specification_IHI0029E.pdf 

Have a great day,
TIC

 

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antoinezen
Contributor III

Hi Jeremy,

Thanks for the answer. That's what I read too. As I'm not using the coresight module neigter the WAKEUP pin, what could cause the NMI interrupt to trigger ?

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jeremyzhou
NXP Employee
NXP Employee

Hi Antoine Zen-Ruffinen,

Thanks for your reply.
As I know, there's no other trigger source yet except for the above two trigger source.
And from my experience, finding out how to replicate the phenomenon is essential, as it would provide some clues on this issue.

Have a great day,
TIC

 

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armandc_
Contributor III

I searched if the NMI source is available in a register, but found nothing. That would help debugging the issue if we would be able to identify the NMI source.

Armand

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antoinezen
Contributor III

According "ARM v7-M Architecture Reference Manual", setting bit 31 "NMIPENDSET" of ICSR register of the SCS block would trigger a NMI interrupt:

NMIPENDSET, bit[31]
 On writes, makes the NMI exception active. On reads, indicates the state of the exception:
 0 On writes, has no effect. On reads, NMI is inactive

 1 On writes, make the NMI exception active. On reads, NMI is active.

I don't see what set this bit in my code or in ZephyrOS. Never the less, I will look on that side if I have no other suspect. 

Hope this partial answer can be useful to others.

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