Minimum SWD Debug pins for i.MXRT1064 w /LPC-Link2

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Minimum SWD Debug pins for i.MXRT1064 w /LPC-Link2

Contributor I

I'm confused about what pins are necessary to get SWD debugging working with the i.MXRT1064. (I will be using LPC-Link2). All the documentation I can find is for JTAG.

Do I need to keep JTAG_MOD (GPIO_AD_B0_08) low for SWD mode? The CEC manual says:

JTAG_MOD set to hi configures the JTAG interface to mode compliant with IEEE1149.1 standard.
JTAG_MOD set to low configures the JTAG interface for common SW debug adding all the system
TAPs to the chain.

but if this is a JTAG pin and JTAG isn't active, is this relevant? 

Do I need a reset pin? I can't find anything that says SWD needs a reset pin in the manual, but I've read online that you do need a reset pin. If, so would that be JTAG_TRSTB (GPIO_AD_B0_11) or is that JTAG specific? If so, is there another reset I should use (ONOFF?)

Also, do I need pull-up or pull-downs on the SWD_DIO and SWD_CLK pins? The CEC manual (Table 4) for JTAG says that JTAG_TMS (same pin as SWD_DIO) needs 47k pull-up and that JTAG_TCK (same pins as SWD_CLK) needs a 100k pull-down, but does this apply for SWD as well?

I'm assuming I can ignore the SWO pin as the i.MXRT does not mention it.

And finally, do I need to bring out VCC ("JTAG_VREF") for SWD debugging? Again, my plan is to use the LPC-Link2 and connect the process to it via 10-pin 'jtag' connector J7.



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NXP TechSupport
NXP TechSupport

Hello Ben,


I recommend you to check the blog below from a colleague where it gives a general explanation about SWD required connections. Reset is needed and SWO is optional.


Using the FRDM-K64F with CodeWarrior | MCU on Eclipse


Also, please check the following link to see the SWD connection recommendation according to Arm Cortex Debug specification.

Documentation – Arm Developer

Hope it helps!


Best regards,




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