I just realised that the pin muxing on the MIMXRT106x parts means that you cannot have LCD + SDRAM + 2 x Ethernet.
This is because signal ENET2_MDC is only available on pins D6 and D7
Pin D6 is also the only pin that can be used for SEMC_DM1
Pin D7 is also the only pin that can be used for LCDIF_CLK
This is a shame!
One of the attractive things about this device is the great LCD interface and the 2 x Ethernet.
And you need the SDRAM for frame buffers.
Thanks very much Mark - this is useful to know!
Just for info, I worked out that you can pin mux 2 x ethernet and SDRAM and LCD on the same board, but unfortunately at the expense of the microSD card (the 2nd ethernet uses the same pins as the microSD, so you could potentially trade on of those off against the other depending on requirements, the layout would be different though)
The first MDIO interface can be used to control PHYs for both ETH1 and ETH2 - since one MDIO bus can be used to control up to 31 PHYs (via the PHY addressing). Therefore it shouldn't be a major problem when the second dedicated MDIO bus can't be used.
Also the MDIO operation could be bit-banged on any free ports in an absolute emergency.
[uTasker project developer for Kinetis and i.MX RT]