MCUXpresso and RT1050 HyperFlash Programming

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MCUXpresso and RT1050 HyperFlash Programming

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Contributor IV

Hello I am using MCUXpresso IDE, version v10.1.0 [Build 589] [2017-11-14] with an MIMXRT1050-EVK SDK, version  2.3.0 (2017-11-16).  I have been experimenting with the hello_world_xip example to run an application out of HyperFlash but have noticed some issues that I was hoping someone could explain. 

When I attempt to program and debug the HyperFlash the programming phase completes as expected but I run into the following error which results in the termination of the debug session.

MCUXpresso RedlinkMulti Driver v10.1 (Nov  9 2017 16:47:53 - crt_emu_cm_redlink build 360)
Found chip XML file in /home/colby/workspace-nxp/evkmimxrt1050_demo_apps_hello_world_xip/Debug/MIMXRT1052xxxxx.xml
Reconnected to existing redlink server (PID 4294967295)
Connecting to probe 1 core 0 (server PID unknown) gave 'OK'
Probe Firmware: DAPLink CMSIS-DAP (ARM)
Serial Number:  0225000041114e450025300ac207002a92d1000097969900
VID:PID:  0D28:0204
USB Path: /dev/hidraw1
debug interface type      = <unknown> (DAP DP ID 0BD11477) over SWD
processor type            = Cortex-M7 (CPU ID 410FC270)
number of h/w breakpoints = 8
number of flash patches   = 0
number of h/w watchpoints = 4
Probe(0): Connected&Reset. DpID: 0BD11477. CpuID: 410FC270. Info: <None>
Debug protocol: SWD. RTCK: Disabled. Vector catch: Disabled.
Content of CoreSight Debug ROM(s):
RBASE E00FD000: CID B105100D PID 000008E88C ROM dev (type 0x1)
ROM 1 E00FE000: CID B105100D PID 04000BB4C8 ROM dev (type 0x1)
ROM 2 E00FF000: CID B105100D PID 04000BB4C7 ROM dev (type 0x1)
ROM 3 E000E000: CID B105E00D PID 04000BB00C ChipIP dev SCS (type 0x0)
ROM 3 E0001000: CID B105E00D PID 04000BB002 ChipIP dev DWT (type 0x0)
ROM 3 E0002000: CID B105E00D PID 04000BB00E ChipIP dev (type 0x0)
ROM 3 E0000000: CID B105E00D PID 04000BB001 ChipIP dev ITM (type 0x0)
ROM 2 E0041000: CID B105900D PID 04001BB975 ARCH 23B:4A13r0 CoreSight dev type 0x13 Trace Source - core
ROM 2 E0042000: CID B105900D PID 04004BB906 CoreSight dev type 0x14 Debug Control - Trigger, e.g. ECT
ROM 1 E0040000: CID B105900D PID 04000BB9A9 CoreSight dev type 0x11 Trace Sink - TPIU
ROM 1 E0043000: CID B105F00D PID 04001BB101 System dev (type 0x0)
CM7 Rev. 0.0  DTCM: 512KB  ITCM: 512KB
LoUU: Level 2: LoC: Level 2
Level 1 Cache Type: Instruction+Data
ICache 32K: WT: Y WB: Y RA: Y WA: Y NumSets:  512 Assoc:   2 LineSize:  8
DCache 32K: WT: Y WB: Y RA: Y WA: Y NumSets:  256 Assoc:   4 LineSize:  8
Inspected v.2 External Flash Device on SPI using SPIFI lib MIMXRT1050-EVK_S26KS512S.cfx
Image 'MIMXRT1050-EVK_S26KS512SOct 19 2017 16:37:47'
Opening flash driver MIMXRT1050-EVK_S26KS512S.cfx
Sending VECTRESET to run flash driver
flash variant 'S26KS512S' detected (64MB = 256*256K at 0x60000000)
Closing flash driver MIMXRT1050-EVK_S26KS512S.cfx
NXP: MIMXRT1052xxxxx
( 65) Chip Setup Complete
Connected: was_reset=true. was_stopped=false
MCUXpresso Free License - Downloads unlimited
Awaiting telnet connection to port 3330 ...
GDB nonstop mode enabled
Opening flash driver MIMXRT1050-EVK_S26KS512S.cfx (already resident)
Sending VECTRESET to run flash driver
Writing 24584 bytes to address 0x60000000 in Flash
Erased/Wrote page  0-0 with 24584 bytes in 1754msec
Closing flash driver MIMXRT1050-EVK_S26KS512S.cfx
Flash Write Done
Flash Program Summary: 24584 bytes in 1.75 seconds (13.69 KB/sec)
Starting execution using system reset and halt target
flash - system reset failed - Ee(FF). Redlink interface error 255.
Target error from Commit Flash write: Ee(FF). Redlink interface error 255.
GDB stub (crt_emu_cm_redlink) terminating - GDB protocol problem: Pipe has been closed by GDB.
error closing down debug session - Ee(FF). Redlink interface error 255.

After examining the application README.txt and reviewing some online posts I realize that I can attach the debugger to a running target and debug, however, there appear to be significant limitations to this approach:

1) Given that the application is already running when I attach, I cannot debug issues that occur early on in the init. process which is often the time when stepping through code is most necessary.

2) Any attempt to reset the processor via the debug "Restart" menu option or hardware reset terminates the debug session and I'm back at issue 1

I am assuming that this is a known limitation or expected behavior but it is very inconvenient. Is there any plan to fix it?

Is there any way to step through code in the early init. stages using the attach and debug process?

Thanks.

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13 Replies

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NXP Employee
NXP Employee

Hi Ed, Ryan,

Have you tried this?  

If the EVK board exhibits intermittent operation, use a USB Y cable with two USB A to single micro B connector or an external power supply via the barrel jack (place a jumper across pins 1 and 2 of header J1) to power the board.

In addition to updating the firmware, a minor board modification is required to use the USB power switch that is part of the OpenSDA circuit. To do this you need to remove R353 and populate or solder across R352.

1050_circuit.jpg

Regards,

Juan Mendoza

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NXP Employee
NXP Employee

We have posted a blog article on using MCUXpresso IDE with the RT1050 that you might want to take a look at : Overview of using the MIMXRT1050-EVK with MCUXpresso IDE 

If you continue to see problems debugging your MIMXRT1050-EVK board with MCUXpresso IDE, then I would suggest that you consider posting in the MCUXpresso IDE community, which is actively monitored by the IDE team.

Regards,

MCUXpresso IDE Support

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Contributor IV

Thank you for posting this document, it is helpful, however, the document makes no mention of XIP out of QSPI Flash.  Could you please clarify if XIP out of QSPI Flash is even possible?  If so then please direct me to documentation explaining how this is accomplished.

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Contributor III

Hi everyone,

I am in a similar boat as Ryan. My MIMXRT1050-EVK also had the interface version at 241 and bootloader at 242. I downloaded k20dx_mimxrt1050_evk_qspi_if_crc.bin from the link Mark specified above, programmed my EVK with it and reseated the USB cable. The board came up running interface version 244 and bootloader 242, although the drive name changed to RT1050-EVK (forgot what it was previously)

# DAPLink Firmware - see https://mbed.com/daplink Unique ID: 0227000041114e45001f300ac207004992d1000097969900 HIC ID: 97969900 Auto Reset: 0 Automation allowed: 0 Overflow detection: 0 Daplink Mode: Interface Interface Version: 0244 Bootloader Version: 0242 Git SHA: 853df431d81359e822f49363891f877f17d31efb Local Mods: 0 USB Interfaces: MSD, CDC, HID Bootloader CRC: 0x73707d49 Interface CRC: 0x16f4aa60 Remount count: 0

With this in place I built hello_world_xip and tried to enter debug mode. It seems the image transferred but has a hard time starting up:

MCUXpresso RedlinkMulti Driver v10.1 (Nov 9 2017 16:45:39 - crt_emu_cm_redlink build 360)
Found chip XML file in C:/Users/Edw/Documents/MCUXpressoIDE_10.1.0_589/ew_workspace/evkmimxrt1050_demo_apps_hello_world_xip/Debug\MIMXRT1052xxxxx.xml
Reconnected to existing redlink server (PID 4294967295)
Connecting to probe 1 core 0 (server PID unknown) gave 'OK'
Probe Firmware: DAPLink CMSIS-DAP (ARM)
Serial Number: 0227000041114e45001f300ac207004992d1000097969900
VID:PID: 0D28:0204
USB Path: \\?\hid#vid_0d28&pid_0204&mi_03#f&ded7bc5&0&0000#{4d1e55b2-f16f-11cf-88cb-001111000030}
connection failed - Ee(FF). Redlink interface error 255... Retrying
Failed on connect: Ee(FF). Redlink interface error 255.
Connected&Reset. Was: NotConnected. DpID: 00000000. CpuID: 00000000. Info: <None>
Last stub error 0: OK
Last sticky error: 0x0 AIndex: 0
Debug bus selected: MemAp 0
DAP Speed test unexecuted or failed
Debug protocol: SWD. RTCK: Disabled. Vector catch: Disabled.
(100) Target Connection Failed
error closing down debug session - Ee(FF). Redlink interface error 255.

Similar experience with other SDK demo projects.

Anyone get past this point?

-Ed.

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Contributor IV

Hello Ed.  I followed the procedure and also encountered some of the bad behavior you mentioned.  Strangely, it took several reboots of Linux and replugging the EVK USB before it began to work.  Previous to that the EVK would not enumerate at all and no dmesg activity could be seen.  At any rate, I was for the first time able to download and debug the XIP application via IDE without the attach to running target option so that's progress.

Thanks.

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NXP Employee
NXP Employee

Check the version of DAPLink that is running on your debugger. This fault looks like an older version of DAPLink.

Open the DETAILS.TXT file on the EVK-MIMXRT drive. It should look like this:

# DAPLink Firmware - see https://mbed.com/daplink
Unique ID: 0225000032254e450023800ab52900153f31000097969900
HIC ID: 97969900
Auto Reset: 0
Automation allowed: 0
Overflow detection: 0
Daplink Mode: Interface
Interface Version: 0244  <<<<<<<<<<<<<<<<<<<<< IMPORTANT
Bootloader Version: 0242
Git SHA: 5a3743f958f65524e9a5cae57cc3ca2226fdfb9f
Local Mods: 1
USB Interfaces: MSD, CDC, HID
Bootloader CRC: 0x73707d49
Interface CRC: 0xcab5e749
Remount count: 0

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Contributor IV

Hello Mark, the file contents are as follows:

# DAPLink Firmware - see https://mbed.com/daplink
Unique ID: 0225000041114e450025300ac207002a92d1000097969900
HIC ID: 97969900
Auto Reset: 0
Automation allowed: 0
Daplink Mode: Interface
Interface Version: 0241
Bootloader Version: 0242
Git SHA: 34182e2cce4ca99073443ef29fbcfaab9e18caec
Local Mods: 1
USB Interfaces: MSD, CDC, HID
Bootloader CRC: 0x73707d49
Interface CRC: 0x92919274

So it appears to be an older version, however, the generic link you provided is forwarded to the BBC micro:bit DAPLink web site.  The following GitHub Repo is mentioned in the ARM DAPLink web site but does not mention the RT1050.  Sorry but I am new the the NXP processors, how exactly do I upgrade the DAPLink firmware on the MIMXRT1050-EVK?

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NXP Employee
NXP Employee
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Contributor IV

Hello Mark, thanks for the post.  Please see my response to Ed below.  I now need some clarification on the binary files that are available at the link you posted.  Keep in mind I am using an unmodified EVK, QSPI Flash is completely disconnected.

As with Ed, the file I used to upgrade my EVK and which now allows me to program and debug a HyperFlash XIP application from the IDE is called k20dx_mimxrt1050_evk_qspi_if_crc.bin while the other binary called k20dx_mimxrt1050_evk_hyper_if_crc.bin does not work at all.  So why would the one name qspi_if be appropriate for HyperFlash?  What is the k20dx_mimxrt1050_evk_hyper_if_crc.bin file actually for?  Are they perhaps mislabled?

When would I use the k20dx_bl_crc.bin?

Thanks.

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Contributor III

I still cannot get past this issue.

Tried resetting the board, reseating usb cable, restarting PC (running a Win10 base) .

I removed all projects that I had imported from the SDK into MCUXpresso IDE and removed the SDK from the IDE. Downloaded a new SDK from MCUXpresso for the RT1050.

Imported SDK examples hello_world and hello_world_xip and tried to enter debug mode on the eval board.

Build succeeds. First attempt to talk to the board was a 5 sec timeout of a failed xfer attempt, always with the failure message shown below via the debug console. All switch and jumper settings on the eval board are factory settings. Eval board was running the demo program before I started down this path today – never had a successful load.

Although this may not be relevant to this discussion, my MCUXpresso IDE environment also has two additional SDKs v2.2 for the FRDM-K64F and the FRDM-K28F. I plugged in my FRDM-K28F, imported the hello_world project from the respective SDK v2.2 for the FRDM-K28F. That project loaded fine and ran without problems.

I disconnected the FRDM-K28F and reconnected the MIMXRT1050, switched projects to the 1050’s hello_world and ran with the same problems as shown below.

-Ed.

MCUXpresso RedlinkMulti Driver v10.1 (Nov 9 2017 16:45:39 - crt_emu_cm_redlink build 360)

Found chip XML file in C:/Users/Edw/Documents/MCUXpressoIDE_10.1.0_589/ew_workspace/evkmimxrt1050_demo_apps_hello_world_xip/Debug\MIMXRT1052xxxxx.xml

Reconnected to existing redlink server (PID 4294967295)

Connecting to probe 1 core 0 (server PID unknown) gave 'OK'

Probe Firmware: DAPLink CMSIS-DAP (ARM)

Serial Number: 0227000041114e45001f300ac207004992d1000097969900

VID:PID: 0D28:0204

USB Path:
?\hid#vid_0d28&pid_0204&mi_03#f&ded7bc5&0&0000#{4d1e55b2-f16f-11cf-88cb-001111000030}

debug interface type =

Debug protocol: SWD. RTCK: Disabled. Vector catch: Disabled.

Content of CoreSight Debug ROM(s):

RBASE E00FD000: CID B105100D PID 000008E88C ROM dev (type 0x1)

ROM 1 E00FE000: CID B105100D PID 04000BB4C8 ROM dev (type 0x1)

ROM 2 E00FF000: CID B105100D PID 04000BB4C7 ROM dev (type 0x1)

ROM 3 E000E000: CID B105E00D PID 04000BB00C ChipIP dev SCS (type 0x0)

ROM 3 E0001000: CID B105E00D PID 04000BB002 ChipIP dev DWT (type 0x0)

ROM 3 E0002000: CID B105E00D PID 04000BB00E ChipIP dev (type 0x0)

ROM 3 E0000000: CID B105E00D PID 04000BB001 ChipIP dev ITM (type 0x0)

ROM 2 E0041000: CID B105900D PID 04001BB975 ARCH 23B:4A13r0 CoreSight dev type 0x13 Trace Source - core

ROM 2 E0042000: CID B105900D PID 04004BB906 CoreSight dev type 0x14 Debug Control - Trigger, e.g. ECT

ROM 1 E0040000: CID B105900D PID 04000BB9A9 CoreSight dev type 0x11 Trace Sink - TPIU

ROM 1 E0043000: CID B105F00D PID 04001BB101 System dev (type 0x0)

CM7 Rev. 0.0 DTCM: 512KB ITCM: 512KB

LoUU: Level 2: LoC: Level 2

Level 1 Cache Type: Instruction+Data

ICache 32K: WT: Y WB: Y RA: Y WA: Y NumSets: 512 Assoc: 2 LineSize: 8

DCache 32K: WT: Y WB: Y RA: Y WA: Y NumSets: 256 Assoc: 4 LineSize: 8

Inspected v.2 External Flash Device on SPI using SPIFI lib MIMXRT1050-EVK_S26KS512S.cfx

Image 'MIMXRT1050-EVK_S26KS512SOct 19 2017 16:37:47'

Opening flash driver MIMXRT1050-EVK_S26KS512S.cfx

chip initialization failed - Ee(FF). Redlink interface error 255.

failed to find a target memory area to use to test the Debug Access Port

required information about vendor NXP chip MIMXRT1052xxxxx not found

Failed on chip setup: Ec(01). Invalid part, XML, or configuration.

error closing down debug session - Ee(FF). Redlink interface error 255.

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Contributor IV

Thanks for the response Mark, I will look into upgrading DAPLink.

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NXP Employee
NXP Employee

Hi Ryan,

It can require double-headed USB cable for higher current capability on some laptops. Lower current capability can cause incorrect power sequence (see requirement for power sequence in device datasheet) during RT power up and this can lead into the boot failure. Another option is to move J1 to 1-2 and supply power through the barrel connector instead.


Regards,
Carlos

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Contributor IV

Thanks for the response Carlos, I'll try it out.

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