I try to configure a MAX2771 component (GNSS receiver) with an IMXRT1064 by SPI. The IMXRT1064 is a master and the MAX277 is a slave.
I succeed in writing into the MAX2771 registers ( 48 bits / frame) by using the sdk exemple (driver_examples\lpspi\interrupt).
I did not succeed in reading the MAX2771 registers . How do I proceed to configure LPSPI to work as follow?
- The IMX first asserts CSN (low) ,
- Then it transferts address (12 bits) + 1 read bit and 3 bits to 0,
- Then SDATA is set in tri-stated by the IMX and it generates 32 clk,
- The MAX2771 then starts driving SDATA () and outputting the 32 bits,
- The IMX disasserts CSN (high),
- The IMX read his "RDR register" to have the MAX2771 register value.
Do you have exemples ?
You can find attached "Register Read Functional Timing" figure
Thank you for your help.
I recommend you to check how the masterConfig structure is configured in the example. Here you can change bits per frame, clock polarity, PCS active high or low, etc. according to your device needs.
lpspi_master_config_t masterConfig; /*Master config*/ masterConfig.baudRate = TRANSFER_BAUDRATE; masterConfig.bitsPerFrame = 8; masterConfig.cpol = kLPSPI_ClockPolarityActiveHigh; masterConfig.cpha = kLPSPI_ClockPhaseFirstEdge; masterConfig.direction = kLPSPI_MsbFirst; masterConfig.pcsToSckDelayInNanoSec = 1000000000 / masterConfig.baudRate; masterConfig.lastSckToPcsDelayInNanoSec = 1000000000 / masterConfig.baudRate; masterConfig.betweenTransferDelayInNanoSec = 1000000000 / masterConfig.baudRate; masterConfig.whichPcs = EXAMPLE_LPSPI_MASTER_PCS_FOR_INIT; masterConfig.pcsActiveHighOrLow = kLPSPI_PcsActiveLow; masterConfig.pinCfg = kLPSPI_SdiInSdoOut; masterConfig.dataOutConfig = kLpspiDataOutRetained; srcClock_Hz = LPSPI_MASTER_CLK_FREQ; LPSPI_MasterInit(EXAMPLE_LPSPI_MASTER_BASEADDR, &masterConfig, srcClock_Hz);