Interface with both SDRAM and SRAM together via the SEMC on an RT1064-based design

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Interface with both SDRAM and SRAM together via the SEMC on an RT1064-based design

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yangzeyong
Contributor III

I am working on an RT1064-based design that will interface with both SDRAM and SRAM
together via the SEMC peripheral. The SRAM is asynchronous, ADMUX mode 16-bit access.

I'd like to get confirmation that the SEMC can interface with SRAM & SDRAM
together in the same design. Specifically, that the following SEMC pins can co-exist:

SEMC_ADDR11 being SDRAM A11 and SRAM WE#
SEMC_ADDR12 being SDRAM A12 and SRAM OE#
SEMC_DM0 being SDRAM DQM0 and SRAM LB#
SEMC_DM1 being SDRAM DQM1 and SRAM UB#

SEMC_BA1 being SDRAM BA1 and SRAM ADV#

Thanks!

 

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jingpan
NXP TechSupport
NXP TechSupport

Hi @yangzeyong ,

Yes, no problem.

 

Regards,

Jing

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