IMXRT106F with eMMC

[pjanco]

Hi,

we are developing board with IMXRT1062 and 3,3V, 4bit eMMC chip connected to USDHC1. eMMC is used only as data storage, code is running from hyperflash. eMMC was initiated to 52Mhz HS mode and it was working fine.

Now we do a change in design and replace 1062 by 106F CPU.

With 106F, eMMC chip stop working with the same source code as before. We figure out that if we change driver stregth configuration of pins from "7" to "3" it solve the problem. But we do not understand why it have different behavior?

We do alot of other changes in this design revision, it is not just simple replacing a CPU by other one. But I thing this changes should not affect USDHC interface.

Do you guys know what can cause this diference?

Is USDHC interface on IMXRT1062 and on IMXRT106F the same?

Regards,

Peter.

[jeremyzhou]

Hi Peter,

Thank you for your interest in NXP Semiconductor products and
for the opportunity to serve you.
1) Do you guys know what can cause this difference?
-- No, we feel a bit confused with that phenomenon too, and was this phenomenon happen on other boards too? According to the introduction, the code can run handle the eMMC chip successful after changing the driver strength configuration of uSDHC's pins from '7' to '3', I'd like to know whether you ever try to use the oscilloscope or logic analyzer to compare the signal waves between these two configurations. If not, please give a try.
2) Is USDHC interface on IMXRT1062 and on IMXRT106F the same?
-- Yes.

Have a great day,
TIC

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